Loading Documentation/ioctl/ioctl-number.txt +1 −0 Original line number Diff line number Diff line Loading @@ -139,6 +139,7 @@ Code Seq# Include File Comments 'm' all linux/synclink.h conflict! 'm' 00-1F net/irda/irmod.h conflict! 'n' 00-7F linux/ncp_fs.h 'n' 80-8F linux/nilfs2_fs.h NILFS2 'n' E0-FF video/matrox.h matroxfb 'o' 00-1F fs/ocfs2/ocfs2_fs.h OCFS2 'o' 00-03 include/mtd/ubi-user.h conflict! (OCFS2 and UBI overlaps) Loading Documentation/kernel-parameters.txt +4 −0 Original line number Diff line number Diff line Loading @@ -1116,6 +1116,10 @@ and is between 256 and 4096 characters. It is defined in the file Combinations also work, so libata.dma=3 enables DMA for disks and CDROMs, but not CFs. libata.ignore_hpa= [LIBATA] Ignore HPA limit libata.ignore_hpa=0 keep BIOS limits (default) libata.ignore_hpa=1 ignore limits, using full disk libata.noacpi [LIBATA] Disables use of ACPI in libata suspend/resume when set. Format: <int> Loading arch/arm/plat-s3c24xx/clock-dclk.c +1 −1 Original line number Diff line number Diff line Loading @@ -129,7 +129,7 @@ static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent) /* calculate the MISCCR setting for the clock */ if (parent == &clk_xtal) if (parent == &clk_mpll) source = S3C2410_MISCCR_CLK0_MPLL; else if (parent == &clk_upll) source = S3C2410_MISCCR_CLK0_UPLL; Loading arch/ia64/Makefile +0 −5 Original line number Diff line number Diff line Loading @@ -41,11 +41,6 @@ $(error Sorry, you need a newer version of the assember, one that is built from ftp://ftp.hpl.hp.com/pub/linux-ia64/gas-030124.tar.gz) endif ifeq ($(call cc-version),0304) cflags-$(CONFIG_ITANIUM) += -mtune=merced cflags-$(CONFIG_MCKINLEY) += -mtune=mckinley endif KBUILD_CFLAGS += $(cflags-y) head-y := arch/ia64/kernel/head.o arch/ia64/kernel/init_task.o Loading arch/ia64/include/asm/bitops.h +1 −1 Original line number Diff line number Diff line Loading @@ -286,7 +286,7 @@ __test_and_clear_bit(int nr, volatile void * addr) { __u32 *p = (__u32 *) addr + (nr >> 5); __u32 m = 1 << (nr & 31); int oldbitset = *p & m; int oldbitset = (*p & m) != 0; *p &= ~m; return oldbitset; Loading Loading
Documentation/ioctl/ioctl-number.txt +1 −0 Original line number Diff line number Diff line Loading @@ -139,6 +139,7 @@ Code Seq# Include File Comments 'm' all linux/synclink.h conflict! 'm' 00-1F net/irda/irmod.h conflict! 'n' 00-7F linux/ncp_fs.h 'n' 80-8F linux/nilfs2_fs.h NILFS2 'n' E0-FF video/matrox.h matroxfb 'o' 00-1F fs/ocfs2/ocfs2_fs.h OCFS2 'o' 00-03 include/mtd/ubi-user.h conflict! (OCFS2 and UBI overlaps) Loading
Documentation/kernel-parameters.txt +4 −0 Original line number Diff line number Diff line Loading @@ -1116,6 +1116,10 @@ and is between 256 and 4096 characters. It is defined in the file Combinations also work, so libata.dma=3 enables DMA for disks and CDROMs, but not CFs. libata.ignore_hpa= [LIBATA] Ignore HPA limit libata.ignore_hpa=0 keep BIOS limits (default) libata.ignore_hpa=1 ignore limits, using full disk libata.noacpi [LIBATA] Disables use of ACPI in libata suspend/resume when set. Format: <int> Loading
arch/arm/plat-s3c24xx/clock-dclk.c +1 −1 Original line number Diff line number Diff line Loading @@ -129,7 +129,7 @@ static int s3c24xx_clkout_setparent(struct clk *clk, struct clk *parent) /* calculate the MISCCR setting for the clock */ if (parent == &clk_xtal) if (parent == &clk_mpll) source = S3C2410_MISCCR_CLK0_MPLL; else if (parent == &clk_upll) source = S3C2410_MISCCR_CLK0_UPLL; Loading
arch/ia64/Makefile +0 −5 Original line number Diff line number Diff line Loading @@ -41,11 +41,6 @@ $(error Sorry, you need a newer version of the assember, one that is built from ftp://ftp.hpl.hp.com/pub/linux-ia64/gas-030124.tar.gz) endif ifeq ($(call cc-version),0304) cflags-$(CONFIG_ITANIUM) += -mtune=merced cflags-$(CONFIG_MCKINLEY) += -mtune=mckinley endif KBUILD_CFLAGS += $(cflags-y) head-y := arch/ia64/kernel/head.o arch/ia64/kernel/init_task.o Loading
arch/ia64/include/asm/bitops.h +1 −1 Original line number Diff line number Diff line Loading @@ -286,7 +286,7 @@ __test_and_clear_bit(int nr, volatile void * addr) { __u32 *p = (__u32 *) addr + (nr >> 5); __u32 m = 1 << (nr & 31); int oldbitset = *p & m; int oldbitset = (*p & m) != 0; *p &= ~m; return oldbitset; Loading