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Commit 818270d5 authored by Rob Herring's avatar Rob Herring
Browse files

ARM: versatile: use OF init for sp804 timer 



Enable DT based init for the sp804 timers on versatile DT platform.

Signed-off-by: default avatarRob Herring <rob.herring@calxeda.com>
parent cc8e9ad8

arch/arm/boot/dts/versatile-ab.dts

+12 −0
Original line number Original line Diff line number Diff line
@@ -121,6 +121,18 @@ 
			interrupts = <0>;

			interrupts = <0>;

		};

		};





		timer@101e2000 {

			compatible = "arm,sp804", "arm,primecell";

			reg = <0x101e2000 0x1000>;

			interrupts = <4>;

		};



		timer@101e3000 {

			compatible = "arm,sp804", "arm,primecell";

			reg = <0x101e3000 0x1000>;

			interrupts = <5>;

		};



		gpio0: gpio@101e4000 {

		gpio0: gpio@101e4000 {

			compatible = "arm,pl061", "arm,primecell";

			compatible = "arm,pl061", "arm,primecell";

			reg = <0x101e4000 0x1000>;

			reg = <0x101e4000 0x1000>;

arch/arm/mach-versatile/core.c

+13 −13
Original line number Original line Diff line number Diff line
@@ -749,12 +749,25 @@ void versatile_restart(char mode, const char *cmd) 
/* Early initializations */

/* Early initializations */

void __init versatile_init_early(void)

void __init versatile_init_early(void)

{

{

	u32 val;

	void __iomem *sys = __io_address(VERSATILE_SYS_BASE);

	void __iomem *sys = __io_address(VERSATILE_SYS_BASE);





	osc4_clk.vcoreg	= sys + VERSATILE_SYS_OSCCLCD_OFFSET;

	osc4_clk.vcoreg	= sys + VERSATILE_SYS_OSCCLCD_OFFSET;

	clkdev_add_table(lookups, ARRAY_SIZE(lookups));

	clkdev_add_table(lookups, ARRAY_SIZE(lookups));





	versatile_sched_clock_init(sys + VERSATILE_SYS_24MHz_OFFSET, 24000000);

	versatile_sched_clock_init(sys + VERSATILE_SYS_24MHz_OFFSET, 24000000);



	/*

	 * set clock frequency:

	 *	VERSATILE_REFCLK is 32KHz

	 *	VERSATILE_TIMCLK is 1MHz

	 */

	val = readl(__io_address(VERSATILE_SCTL_BASE));

	writel((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) |

	       (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) |

	       (VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) |

	       (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel) | val,

	       __io_address(VERSATILE_SCTL_BASE));

}

}





void __init versatile_init(void)

void __init versatile_init(void)
@@ -785,19 +798,6 @@ void __init versatile_init(void) 
 */

 */

void __init versatile_timer_init(void)

void __init versatile_timer_init(void)

{

{

	u32 val;



	/* 

	 * set clock frequency: 

	 *	VERSATILE_REFCLK is 32KHz

	 *	VERSATILE_TIMCLK is 1MHz

	 */

	val = readl(__io_address(VERSATILE_SCTL_BASE));

	writel((VERSATILE_TIMCLK << VERSATILE_TIMER1_EnSel) |

	       (VERSATILE_TIMCLK << VERSATILE_TIMER2_EnSel) | 

	       (VERSATILE_TIMCLK << VERSATILE_TIMER3_EnSel) |

	       (VERSATILE_TIMCLK << VERSATILE_TIMER4_EnSel) | val,

	       __io_address(VERSATILE_SCTL_BASE));





	/*

	/*

	 * Initialise to a known state (all timers off)

	 * Initialise to a known state (all timers off)

arch/arm/mach-versatile/versatile_dt.c

+0 −1
Original line number Original line Diff line number Diff line
@@ -45,7 +45,6 @@ DT_MACHINE_START(VERSATILE_PB, "ARM-Versatile (Device Tree Support)") 
	.map_io		= versatile_map_io,

	.map_io		= versatile_map_io,

	.init_early	= versatile_init_early,

	.init_early	= versatile_init_early,

	.init_irq	= versatile_init_irq,

	.init_irq	= versatile_init_irq,

	.init_time	= versatile_timer_init,

	.init_machine	= versatile_dt_init,

	.init_machine	= versatile_dt_init,

	.dt_compat	= versatile_dt_match,

	.dt_compat	= versatile_dt_match,

	.restart	= versatile_restart,

	.restart	= versatile_restart,