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Commit 81609e3e authored by Avi Kivity's avatar Avi Kivity
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KVM: Order segment register constants in the same way as cpu operand encoding



This can be used to simplify the x86 instruction decoder.

Signed-off-by: default avatarAvi Kivity <avi@qumranet.com>
parent f08864b4
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+2 −2
Original line number Original line Diff line number Diff line
@@ -109,12 +109,12 @@ enum {
};
};


enum {
enum {
	VCPU_SREG_ES,
	VCPU_SREG_CS,
	VCPU_SREG_CS,
	VCPU_SREG_SS,
	VCPU_SREG_DS,
	VCPU_SREG_DS,
	VCPU_SREG_ES,
	VCPU_SREG_FS,
	VCPU_SREG_FS,
	VCPU_SREG_GS,
	VCPU_SREG_GS,
	VCPU_SREG_SS,
	VCPU_SREG_TR,
	VCPU_SREG_TR,
	VCPU_SREG_LDTR,
	VCPU_SREG_LDTR,
};
};