Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 7c77bf2a authored by Alex Deucher's avatar Alex Deucher Committed by Dave Airlie
Browse files

drm/radeon: add support for STRMOUT_BASE_UPDATE on 7xx 



Required for streamout.  Bump drm minor.

Marek v2: fix pkt->count check

Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
Reviewed-by: default avatarMichel Dänzer <michel.daenzer@amd.com>
Signed-off-by: default avatarMarek Olšák <maraeo@gmail.com>
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
parent b866d133

drivers/gpu/drm/radeon/r600_cs.c

+42 −0
Original line number Diff line number Diff line
@@ -2079,6 +2079,48 @@ static int r600_packet3_check(struct radeon_cs_parser *p, 
			return -EINVAL;

		}

		break;

	case PACKET3_STRMOUT_BASE_UPDATE:

		if (p->family < CHIP_RV770) {

			DRM_ERROR("STRMOUT_BASE_UPDATE only supported on 7xx\n");

			return -EINVAL;

		}

		if (pkt->count != 1) {

			DRM_ERROR("bad STRMOUT_BASE_UPDATE packet count\n");

			return -EINVAL;

		}

		if (idx_value > 3) {

			DRM_ERROR("bad STRMOUT_BASE_UPDATE index\n");

			return -EINVAL;

		}

		{

			u64 offset;



			r = r600_cs_packet_next_reloc(p, &reloc);

			if (r) {

				DRM_ERROR("bad STRMOUT_BASE_UPDATE reloc\n");

				return -EINVAL;

			}



			if (reloc->robj != track->vgt_strmout_bo[idx_value]) {

				DRM_ERROR("bad STRMOUT_BASE_UPDATE, bo does not match\n");

				return -EINVAL;

			}



			offset = radeon_get_ib_value(p, idx+1) << 8;

			if (offset != track->vgt_strmout_bo_offset[idx_value]) {

				DRM_ERROR("bad STRMOUT_BASE_UPDATE, bo offset does not match: 0x%llx, 0x%x\n",

					  offset, track->vgt_strmout_bo_offset[idx_value]);

				return -EINVAL;

			}



			if ((offset + 4) > radeon_bo_size(reloc->robj)) {

				DRM_ERROR("bad STRMOUT_BASE_UPDATE bo too small: 0x%llx, 0x%lx\n",

					  offset + 4, radeon_bo_size(reloc->robj));

				return -EINVAL;

			}

			ib[idx+1] += (u32)((reloc->lobj.gpu_offset >> 8) & 0xffffffff);

		}

		break;

	case PACKET3_SURFACE_BASE_UPDATE:

		if (p->family >= CHIP_RV770 || p->family == CHIP_R600) {

			DRM_ERROR("bad SURFACE_BASE_UPDATE\n");

drivers/gpu/drm/radeon/r600d.h

+1 −0
Original line number Diff line number Diff line
@@ -1164,6 +1164,7 @@ 
#define	PACKET3_SET_CTL_CONST				0x6F

#define		PACKET3_SET_CTL_CONST_OFFSET			0x0003cff0

#define		PACKET3_SET_CTL_CONST_END			0x0003e200

#define	PACKET3_STRMOUT_BASE_UPDATE			0x72 /* r7xx */

#define	PACKET3_SURFACE_BASE_UPDATE			0x73

drivers/gpu/drm/radeon/radeon_drv.c

+2 −1
Original line number Diff line number Diff line
@@ -58,9 +58,10 @@ 
 *   2.14.0 - add evergreen tiling informations

 *   2.15.0 - add max_pipes query

 *   2.16.0 - fix evergreen 2D tiled surface calculation

 *   2.17.0 - add STRMOUT_BASE_UPDATE for r7xx

 */

#define KMS_DRIVER_MAJOR	2

#define KMS_DRIVER_MINOR	16

#define KMS_DRIVER_MINOR	17

#define KMS_DRIVER_PATCHLEVEL	0

int radeon_driver_load_kms(struct drm_device *dev, unsigned long flags);

int radeon_driver_unload_kms(struct drm_device *dev);