Loading Documentation/devicetree/bindings/thermal/rockchip-thermal.txt +9 −2 Original line number Diff line number Diff line Loading @@ -12,6 +12,11 @@ Required properties: - resets : Must contain an entry for each entry in reset-names. See ../reset/reset.txt for details. - reset-names : Must include the name "tsadc-apb". - pinctrl-names : The pin control state names; - pinctrl-0 : The "init" pinctrl state, it will be set before device probe. - pinctrl-1 : The "default" pinctrl state, it will be set after reset the TSADC controller. - pinctrl-2 : The "sleep" pinctrl state, it will be in for suspend. - #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. - rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value. - rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO. Loading @@ -27,8 +32,10 @@ tsadc: tsadc@ff280000 { clock-names = "tsadc", "apb_pclk"; resets = <&cru SRST_TSADC>; reset-names = "tsadc-apb"; pinctrl-names = "default"; pinctrl-0 = <&otp_out>; pinctrl-names = "init", "default", "sleep"; pinctrl-0 = <&otp_gpio>; pinctrl-1 = <&otp_out>; pinctrl-2 = <&otp_gpio>; #thermal-sensor-cells = <1>; rockchip,hw-tshut-temp = <95000>; rockchip,hw-tshut-mode = <0>; Loading Documentation/devicetree/bindings/thermal/ti_soc_thermal.txt +14 −0 Original line number Diff line number Diff line Loading @@ -10,6 +10,8 @@ to the silicon temperature. Required properties: - compatible : Should be: - "ti,omap34xx-bandgap" : for OMAP34xx bandgap - "ti,omap36xx-bandgap" : for OMAP36xx bandgap - "ti,omap4430-bandgap" : for OMAP4430 bandgap - "ti,omap4460-bandgap" : for OMAP4460 bandgap - "ti,omap4470-bandgap" : for OMAP4470 bandgap Loading @@ -25,6 +27,18 @@ to each bandgap version, because the mapping may change from soc to soc, apart of depending on available features. Example: OMAP34xx: bandgap { reg = <0x48002524 0x4>; compatible = "ti,omap34xx-bandgap"; }; OMAP36xx: bandgap { reg = <0x48002524 0x4>; compatible = "ti,omap36xx-bandgap"; }; OMAP4430: bandgap { reg = <0x4a002260 0x4 0x4a00232C 0x4>; Loading drivers/base/power/opp.c +2 −2 Original line number Diff line number Diff line Loading @@ -217,7 +217,7 @@ static struct device_opp *_find_device_opp(struct device *dev) } /** * dev_pm_opp_get_voltage() - Gets the voltage corresponding to an available opp * dev_pm_opp_get_voltage() - Gets the voltage corresponding to an opp * @opp: opp for which voltage has to be returned for * * Return: voltage in micro volt corresponding to the opp, else Loading @@ -239,7 +239,7 @@ unsigned long dev_pm_opp_get_voltage(struct dev_pm_opp *opp) opp_rcu_lockdep_assert(); tmp_opp = rcu_dereference(opp); if (IS_ERR_OR_NULL(tmp_opp) || !tmp_opp->available) if (IS_ERR_OR_NULL(tmp_opp)) pr_err("%s: Invalid parameters\n", __func__); else v = tmp_opp->u_volt; Loading drivers/thermal/Kconfig +17 −0 Original line number Diff line number Diff line Loading @@ -147,6 +147,20 @@ config CLOCK_THERMAL device that is configured to use this cooling mechanism will be controlled to reduce clock frequency whenever temperature is high. config DEVFREQ_THERMAL bool "Generic device cooling support" depends on PM_DEVFREQ depends on PM_OPP help This implements the generic devfreq cooling mechanism through frequency reduction for devices using devfreq. This will throttle the device by limiting the maximum allowed DVFS frequency corresponding to the cooling level. In order to use the power extensions of the cooling device, devfreq should use the simple_ondemand governor. If you want this support, you should say Y here. config THERMAL_EMULATION Loading Loading @@ -275,6 +289,7 @@ config X86_PKG_TEMP_THERMAL tristate "X86 package temperature thermal driver" depends on X86_THERMAL_VECTOR select THERMAL_GOV_USER_SPACE select THERMAL_WRITABLE_TRIPS default m help Enable this to register CPU digital sensor for package temperature as Loading @@ -296,6 +311,7 @@ config INTEL_SOC_DTS_THERMAL tristate "Intel SoCs DTS thermal driver" depends on X86 select INTEL_SOC_DTS_IOSF_CORE select THERMAL_WRITABLE_TRIPS help Enable this to register Intel SoCs (e.g. Bay Trail) platform digital temperature sensor (DTS). These SoCs have two additional DTSs in Loading @@ -322,6 +338,7 @@ config INT340X_THERMAL select ACPI_THERMAL_REL select ACPI_FAN select INTEL_SOC_DTS_IOSF_CORE select THERMAL_WRITABLE_TRIPS help Newer laptops and tablets that use ACPI may have thermal sensors and other devices with thermal control capabilities outside the core Loading drivers/thermal/Makefile +3 −0 Original line number Diff line number Diff line Loading @@ -22,6 +22,9 @@ thermal_sys-$(CONFIG_CPU_THERMAL) += cpu_cooling.o # clock cooling thermal_sys-$(CONFIG_CLOCK_THERMAL) += clock_cooling.o # devfreq cooling thermal_sys-$(CONFIG_DEVFREQ_THERMAL) += devfreq_cooling.o # platform thermal drivers obj-$(CONFIG_QCOM_SPMI_TEMP_ALARM) += qcom-spmi-temp-alarm.o obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o Loading Loading
Documentation/devicetree/bindings/thermal/rockchip-thermal.txt +9 −2 Original line number Diff line number Diff line Loading @@ -12,6 +12,11 @@ Required properties: - resets : Must contain an entry for each entry in reset-names. See ../reset/reset.txt for details. - reset-names : Must include the name "tsadc-apb". - pinctrl-names : The pin control state names; - pinctrl-0 : The "init" pinctrl state, it will be set before device probe. - pinctrl-1 : The "default" pinctrl state, it will be set after reset the TSADC controller. - pinctrl-2 : The "sleep" pinctrl state, it will be in for suspend. - #thermal-sensor-cells : Should be 1. See ./thermal.txt for a description. - rockchip,hw-tshut-temp : The hardware-controlled shutdown temperature value. - rockchip,hw-tshut-mode : The hardware-controlled shutdown mode 0:CRU 1:GPIO. Loading @@ -27,8 +32,10 @@ tsadc: tsadc@ff280000 { clock-names = "tsadc", "apb_pclk"; resets = <&cru SRST_TSADC>; reset-names = "tsadc-apb"; pinctrl-names = "default"; pinctrl-0 = <&otp_out>; pinctrl-names = "init", "default", "sleep"; pinctrl-0 = <&otp_gpio>; pinctrl-1 = <&otp_out>; pinctrl-2 = <&otp_gpio>; #thermal-sensor-cells = <1>; rockchip,hw-tshut-temp = <95000>; rockchip,hw-tshut-mode = <0>; Loading
Documentation/devicetree/bindings/thermal/ti_soc_thermal.txt +14 −0 Original line number Diff line number Diff line Loading @@ -10,6 +10,8 @@ to the silicon temperature. Required properties: - compatible : Should be: - "ti,omap34xx-bandgap" : for OMAP34xx bandgap - "ti,omap36xx-bandgap" : for OMAP36xx bandgap - "ti,omap4430-bandgap" : for OMAP4430 bandgap - "ti,omap4460-bandgap" : for OMAP4460 bandgap - "ti,omap4470-bandgap" : for OMAP4470 bandgap Loading @@ -25,6 +27,18 @@ to each bandgap version, because the mapping may change from soc to soc, apart of depending on available features. Example: OMAP34xx: bandgap { reg = <0x48002524 0x4>; compatible = "ti,omap34xx-bandgap"; }; OMAP36xx: bandgap { reg = <0x48002524 0x4>; compatible = "ti,omap36xx-bandgap"; }; OMAP4430: bandgap { reg = <0x4a002260 0x4 0x4a00232C 0x4>; Loading
drivers/base/power/opp.c +2 −2 Original line number Diff line number Diff line Loading @@ -217,7 +217,7 @@ static struct device_opp *_find_device_opp(struct device *dev) } /** * dev_pm_opp_get_voltage() - Gets the voltage corresponding to an available opp * dev_pm_opp_get_voltage() - Gets the voltage corresponding to an opp * @opp: opp for which voltage has to be returned for * * Return: voltage in micro volt corresponding to the opp, else Loading @@ -239,7 +239,7 @@ unsigned long dev_pm_opp_get_voltage(struct dev_pm_opp *opp) opp_rcu_lockdep_assert(); tmp_opp = rcu_dereference(opp); if (IS_ERR_OR_NULL(tmp_opp) || !tmp_opp->available) if (IS_ERR_OR_NULL(tmp_opp)) pr_err("%s: Invalid parameters\n", __func__); else v = tmp_opp->u_volt; Loading
drivers/thermal/Kconfig +17 −0 Original line number Diff line number Diff line Loading @@ -147,6 +147,20 @@ config CLOCK_THERMAL device that is configured to use this cooling mechanism will be controlled to reduce clock frequency whenever temperature is high. config DEVFREQ_THERMAL bool "Generic device cooling support" depends on PM_DEVFREQ depends on PM_OPP help This implements the generic devfreq cooling mechanism through frequency reduction for devices using devfreq. This will throttle the device by limiting the maximum allowed DVFS frequency corresponding to the cooling level. In order to use the power extensions of the cooling device, devfreq should use the simple_ondemand governor. If you want this support, you should say Y here. config THERMAL_EMULATION Loading Loading @@ -275,6 +289,7 @@ config X86_PKG_TEMP_THERMAL tristate "X86 package temperature thermal driver" depends on X86_THERMAL_VECTOR select THERMAL_GOV_USER_SPACE select THERMAL_WRITABLE_TRIPS default m help Enable this to register CPU digital sensor for package temperature as Loading @@ -296,6 +311,7 @@ config INTEL_SOC_DTS_THERMAL tristate "Intel SoCs DTS thermal driver" depends on X86 select INTEL_SOC_DTS_IOSF_CORE select THERMAL_WRITABLE_TRIPS help Enable this to register Intel SoCs (e.g. Bay Trail) platform digital temperature sensor (DTS). These SoCs have two additional DTSs in Loading @@ -322,6 +338,7 @@ config INT340X_THERMAL select ACPI_THERMAL_REL select ACPI_FAN select INTEL_SOC_DTS_IOSF_CORE select THERMAL_WRITABLE_TRIPS help Newer laptops and tablets that use ACPI may have thermal sensors and other devices with thermal control capabilities outside the core Loading
drivers/thermal/Makefile +3 −0 Original line number Diff line number Diff line Loading @@ -22,6 +22,9 @@ thermal_sys-$(CONFIG_CPU_THERMAL) += cpu_cooling.o # clock cooling thermal_sys-$(CONFIG_CLOCK_THERMAL) += clock_cooling.o # devfreq cooling thermal_sys-$(CONFIG_DEVFREQ_THERMAL) += devfreq_cooling.o # platform thermal drivers obj-$(CONFIG_QCOM_SPMI_TEMP_ALARM) += qcom-spmi-temp-alarm.o obj-$(CONFIG_SPEAR_THERMAL) += spear_thermal.o Loading