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Commit 7bc088d3 authored by Sascha Hauer's avatar Sascha Hauer Committed by Chris Ball
Browse files

mmc: sdhci: rename platform_8bit_width to platform_bus_width



The 8bit in the function name is misleading. When set, it will be
used to set the bus width, regardless of whether 8bit or another
bus width is requested, so change the function name to
platform_bus_width.

Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
Tested-by: default avatarDirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: default avatarChris Ball <cjb@laptop.org>
parent 2a15f981
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+2 −2
Original line number Diff line number Diff line
@@ -935,7 +935,7 @@ static int sdhci_pci_enable_dma(struct sdhci_host *host)
	return 0;
}

static int sdhci_pci_8bit_width(struct sdhci_host *host, int width)
static int sdhci_pci_bus_width(struct sdhci_host *host, int width)
{
	u8 ctrl;

@@ -977,7 +977,7 @@ static void sdhci_pci_hw_reset(struct sdhci_host *host)

static struct sdhci_ops sdhci_pci_ops = {
	.enable_dma	= sdhci_pci_enable_dma,
	.platform_8bit_width	= sdhci_pci_8bit_width,
	.platform_bus_width	= sdhci_pci_bus_width,
	.hw_reset		= sdhci_pci_hw_reset,
};

+1 −1
Original line number Diff line number Diff line
@@ -121,7 +121,7 @@ static u32 pxav2_get_max_clock(struct sdhci_host *host)
static struct sdhci_ops pxav2_sdhci_ops = {
	.get_max_clock = pxav2_get_max_clock,
	.platform_reset_exit = pxav2_set_private_registers,
	.platform_8bit_width = pxav2_mmc_set_width,
	.platform_bus_width = pxav2_mmc_set_width,
};

#ifdef CONFIG_OF
+4 −4
Original line number Diff line number Diff line
@@ -332,14 +332,14 @@ static void sdhci_cmu_set_clock(struct sdhci_host *host, unsigned int clock)
}

/**
 * sdhci_s3c_platform_8bit_width - support 8bit buswidth
 * sdhci_s3c_platform_bus_width - support 8bit buswidth
 * @host: The SDHCI host being queried
 * @width: MMC_BUS_WIDTH_ macro for the bus width being requested
 *
 * We have 8-bit width support but is not a v3 controller.
 * So we add platform_8bit_width() and support 8bit width.
 * So we add platform_bus_width() and support 8bit width.
 */
static int sdhci_s3c_platform_8bit_width(struct sdhci_host *host, int width)
static int sdhci_s3c_platform_bus_width(struct sdhci_host *host, int width)
{
	u8 ctrl;

@@ -369,7 +369,7 @@ static struct sdhci_ops sdhci_s3c_ops = {
	.get_max_clock		= sdhci_s3c_get_max_clk,
	.set_clock		= sdhci_s3c_set_clock,
	.get_min_clock		= sdhci_s3c_get_min_clock,
	.platform_8bit_width	= sdhci_s3c_platform_8bit_width,
	.platform_bus_width	= sdhci_s3c_platform_bus_width,
};

static void sdhci_s3c_notify_change(struct platform_device *dev, int state)
+2 −2
Original line number Diff line number Diff line
@@ -143,7 +143,7 @@ static void tegra_sdhci_reset_exit(struct sdhci_host *host, u8 mask)
	}
}

static int tegra_sdhci_8bit(struct sdhci_host *host, int bus_width)
static int tegra_sdhci_buswidth(struct sdhci_host *host, int bus_width)
{
	struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
	struct sdhci_tegra *tegra_host = pltfm_host->priv;
@@ -170,7 +170,7 @@ static struct sdhci_ops tegra_sdhci_ops = {
	.read_l     = tegra_sdhci_readl,
	.read_w     = tegra_sdhci_readw,
	.write_l    = tegra_sdhci_writel,
	.platform_8bit_width = tegra_sdhci_8bit,
	.platform_bus_width = tegra_sdhci_buswidth,
	.platform_reset_exit = tegra_sdhci_reset_exit,
};

+4 −4
Original line number Diff line number Diff line
@@ -1395,11 +1395,11 @@ static void sdhci_do_set_ios(struct sdhci_host *host, struct mmc_ios *ios)
	/*
	 * If your platform has 8-bit width support but is not a v3 controller,
	 * or if it requires special setup code, you should implement that in
	 * platform_8bit_width().
	 * platform_bus_width().
	 */
	if (host->ops->platform_8bit_width)
		host->ops->platform_8bit_width(host, ios->bus_width);
	else {
	if (host->ops->platform_bus_width) {
		host->ops->platform_bus_width(host, ios->bus_width);
	} else {
		ctrl = sdhci_readb(host, SDHCI_HOST_CONTROL);
		if (ios->bus_width == MMC_BUS_WIDTH_8) {
			ctrl &= ~SDHCI_CTRL_4BITBUS;
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