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Commit 7bb0dc22 authored by Ingo Molnar's avatar Ingo Molnar
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x86/headers: Unify 'struct _fpstate_ia32' and i386 struct _fpstate



'struct _fpstate_ia32' and 'struct _fpstate' on i386 are
identical in all fields, except 'padding1' being named
'padding'.

We unify the two structures and add a union that is both named
'padding1' and 'padding', in the (unlikely) case there's
user-space code that relies on the padding field name.

We rename the two main types to be:

  struct _fpstate_32
  struct _fpstate_64

for the 32-bit and 64-bit frame, and map them to the main and
compat structure names (_fpstate) depending on whether we are on
32-bit or on 64-bit kernels.

We also keep the old _fpstate_ia32 name as a legacy name.

Acked-by: default avatarMikko Rapeli <mikko.rapeli@iki.fi>
Cc: Andy Lutomirski <luto@amacapital.net>
Cc: Borislav Petkov <bp@alien8.de>
Cc: Brian Gerst <brgerst@gmail.com>
Cc: Denys Vlasenko <dvlasenk@redhat.com>
Cc: H. Peter Anvin <hpa@zytor.com>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Oleg Nesterov <oleg@redhat.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: linux-kernel@vger.kernel.org
Link: http://lkml.kernel.org/r/1441438363-9999-8-git-send-email-mingo@kernel.org


Signed-off-by: default avatarIngo Molnar <mingo@kernel.org>
parent 337a167d
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+0 −1
Original line number Diff line number Diff line
@@ -10,7 +10,6 @@
#define sigframe_ia32		sigframe
#define rt_sigframe_ia32	rt_sigframe
#define sigcontext_ia32		sigcontext
#define _fpstate_ia32		_fpstate
#define ucontext_ia32		ucontext
#else /* !CONFIG_X86_32 */

+17 −9
Original line number Diff line number Diff line
@@ -95,9 +95,10 @@ struct _xmmreg {

#define X86_FXSR_MAGIC			0x0000

#ifdef __i386__

struct _fpstate {
/*
 * The 32-bit FPU frame:
 */
struct _fpstate_32 {
	/* Legacy FPU environment: */
	__u32				cw;
	__u32				sw;
@@ -117,7 +118,10 @@ struct _fpstate {
	__u32				reserved;
	struct _fpxreg			_fxsr_st[8];	/* FXSR FPU reg data is ignored */
	struct _xmmreg			_xmm[8];	/* First 8 XMM registers */
	union {
		__u32			padding1[44];	/* Second 8 XMM registers plus padding */
		__u32			padding[44];	/* Alias name for old user-space */
	};

	union {
		__u32			padding2[12];
@@ -125,10 +129,8 @@ struct _fpstate {
	};
};

#else /* __x86_64__: */

/*
 * The FXSAVE frame.
 * The 64-bit FPU frame. (FXSAVE format and later)
 *
 * Note1: If sw_reserved.magic1 == FP_XSTATE_MAGIC1 then the structure is
 *        larger: 'struct _xstate'. Note that 'struct _xstate' embedds
@@ -138,7 +140,7 @@ struct _fpstate {
 * Note2: Reserved fields may someday contain valuable data. Always save/restore
 *        them when you change signal frames.
 */
struct _fpstate {
struct _fpstate_64 {
	__u16				cwd;
	__u16				swd;
	/* Note this is not the same as the 32-bit/x87/FSAVE twd: */
@@ -157,7 +159,13 @@ struct _fpstate {
	};
};

#endif /* __x86_64__ */
#ifdef __i386__
# define _fpstate _fpstate_32
#else
# define _fpstate _fpstate_64
#endif

#define _fpstate_ia32 _fpstate_32

struct _header {
	__u64				xfeatures;
+0 −29
Original line number Diff line number Diff line
@@ -5,35 +5,6 @@

#include <asm/sigcontext.h>

/* FXSAVE frame: FSAVE frame with extensions */
struct _fpstate_ia32 {
	/* Regular FPU environment: */
	__u32				cw;
	__u32				sw;
	__u32				tag;		/* Not compatible with the 64-bit frame */
	__u32				ipoff;
	__u32				cssel;
	__u32				dataoff;
	__u32				datasel;
	struct _fpreg			_st[8];
	__u16				status;
	__u16				magic;		/* 0xffff: regular FPU data only */
							/* 0x0000: FXSR data */

	/* Extended FXSR FPU environment: */
	__u32				_fxsr_env[6];
	__u32				mxcsr;
	__u32				reserved;
	struct _fpxreg			_fxsr_st[8];
	struct _xmmreg			_xmm[8];	/* The first  8 XMM registers */
	__u32				padding[44];	/* The second 8 XMM registers plus padding */
	union {
		__u32			padding2[12];
		/* Might encode xstate extensions, see asm/sigcontext.h: */
		struct _fpx_sw_bytes	sw_reserved;
	};
};

/* 32-bit compat sigcontext: */
struct sigcontext_ia32 {
       __u16				gs, __gsh;