Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 7b841727 authored by Rick Farrington's avatar Rick Farrington Committed by John W. Linville
Browse files

iwlagn: reduce off channel reception for 4965



Force use of chains B and C (0x6) for Rx for 4965
Avoid A (0x1) because of its off-channel reception on A-band.

Signed-off-by: default avatarRick Farrington <rickdic@hotmail.com>
Signed-off-by: default avatarBen Cahill <ben.m.cahill@intel.com>
Signed-off-by: default avatarReinette Chatre <reinette.chatre@intel.com>
Signed-off-by: default avatarTomas Winkler <tomas.winkler@intel.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent 4c4df78f
Loading
Loading
Loading
Loading
+3 −0
Original line number Diff line number Diff line
@@ -2698,6 +2698,9 @@ static int iwl_mac_config(struct ieee80211_hw *hw, u32 changed)

	iwl_set_rate(priv);

	/* call to ensure that 4965 rx_chain is set properly in monitor mode */
	iwl_set_rxon_chain(priv);

	if (memcmp(&priv->active_rxon,
		   &priv->staging_rxon, sizeof(priv->staging_rxon)))
		iwl_commit_rxon(priv);
+1 −0
Original line number Diff line number Diff line
@@ -563,6 +563,7 @@ enum {


#define RXON_RX_CHAIN_DRIVER_FORCE_MSK		cpu_to_le16(0x1 << 0)
#define RXON_RX_CHAIN_DRIVER_FORCE_POS		(0)
#define RXON_RX_CHAIN_VALID_MSK			cpu_to_le16(0x7 << 1)
#define RXON_RX_CHAIN_VALID_POS			(1)
#define RXON_RX_CHAIN_FORCE_SEL_MSK		cpu_to_le16(0x7 << 4)
+13 −0
Original line number Diff line number Diff line
@@ -753,6 +753,19 @@ void iwl_set_rxon_chain(struct iwl_priv *priv)
	rx_chain |= active_rx_cnt << RXON_RX_CHAIN_MIMO_CNT_POS;
	rx_chain |= idle_rx_cnt  << RXON_RX_CHAIN_CNT_POS;

	/* copied from 'iwl_bg_request_scan()' */
	/* Force use of chains B and C (0x6) for Rx for 4965
	 * Avoid A (0x1) because of its off-channel reception on A-band.
	 * MIMO is not used here, but value is required */
	if (iwl_is_monitor_mode(priv) &&
	    !(priv->staging_rxon.flags & RXON_FLG_BAND_24G_MSK) &&
	    ((priv->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_4965)) {
		rx_chain = 0x07 << RXON_RX_CHAIN_VALID_POS;
		rx_chain |= 0x06 << RXON_RX_CHAIN_FORCE_SEL_POS;
		rx_chain |= 0x07 << RXON_RX_CHAIN_FORCE_MIMO_SEL_POS;
		rx_chain |= 0x01 << RXON_RX_CHAIN_DRIVER_FORCE_POS;
	}

	priv->staging_rxon.rx_chain = cpu_to_le16(rx_chain);

	if (!is_single && (active_rx_cnt >= IWL_NUM_RX_CHAINS_SINGLE) && is_cam)