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Commit 7b67e751 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci 

* 'linux-next' of git://git.kernel.org/pub/scm/linux/kernel/git/jbarnes/pci: (80 commits)
  x86/PCI: Expand the x86_msi_ops to have a restore MSIs.
  PCI: Increase resource array mask bit size in pcim_iomap_regions()
  PCI: DEVICE_COUNT_RESOURCE should be equal to PCI_NUM_RESOURCES
  PCI: pci_ids: add device ids for STA2X11 device (aka ConneXT)
  PNP: work around Dell 1536/1546 BIOS MMCONFIG bug that breaks USB
  x86/PCI: amd: factor out MMCONFIG discovery
  PCI: Enable ATS at the device state restore
  PCI: msi: fix imbalanced refcount of msi irq sysfs objects
  PCI: kconfig: English typo in pci/pcie/Kconfig
  PCI/PM/Runtime: make PCI traces quieter
  PCI: remove pci_create_bus()
  xtensa/PCI: convert to pci_scan_root_bus() for correct root bus resources
  x86/PCI: convert to pci_create_root_bus() and pci_scan_root_bus()
  x86/PCI: use pci_scan_bus() instead of pci_scan_bus_parented()
  x86/PCI: read Broadcom CNB20LE host bridge info before PCI scan
  sparc32, leon/PCI: convert to pci_scan_root_bus() for correct root bus resources
  sparc/PCI: convert to pci_create_root_bus()
  sh/PCI: convert to pci_scan_root_bus() for correct root bus resources
  powerpc/PCI: convert to pci_create_root_bus()
  powerpc/PCI: split PHB part out of pcibios_map_io_space()
  ...

Fix up conflicts in drivers/pci/msi.c and include/linux/pci_regs.h due
to the same patches being applied in other branches.
parents 9f13a1fd 76ccc297

Documentation/feature-removal-schedule.txt

+12 −0
Original line number Diff line number Diff line
@@ -544,3 +544,15 @@ When: 3.5 
Why:	The iwlagn module has been renamed iwlwifi.  The alias will be around

	for backward compatibility for several cycles and then dropped.

Who:	Don Fry <donald.h.fry@intel.com>



----------------------------



What:	pci_scan_bus_parented()

When:	3.5

Why:	The pci_scan_bus_parented() interface creates a new root bus.  The

	bus is created with default resources (ioport_resource and

	iomem_resource) that are always wrong, so we rely on arch code to

	correct them later.  Callers of pci_scan_bus_parented() should

	convert to using pci_scan_root_bus() so they can supply a list of

	bus resources when the bus is created.

Who:	Bjorn Helgaas <bhelgaas@google.com>

arch/alpha/kernel/pci.c

+20 −20
Original line number Diff line number Diff line
@@ -281,27 +281,9 @@ pcibios_fixup_device_resources(struct pci_dev *dev, struct pci_bus *bus) 
void __devinit

pcibios_fixup_bus(struct pci_bus *bus)

{

	/* Propagate hose info into the subordinate devices.  */



	struct pci_controller *hose = bus->sysdata;

	struct pci_dev *dev = bus->self;



	if (!dev) {

		/* Root bus. */

		u32 pci_mem_end;

		u32 sg_base = hose->sg_pci ? hose->sg_pci->dma_base : ~0;

		unsigned long end;



		bus->resource[0] = hose->io_space;

		bus->resource[1] = hose->mem_space;



		/* Adjust hose mem_space limit to prevent PCI allocations

		   in the iommu windows. */

		pci_mem_end = min((u32)__direct_map_base, sg_base) - 1;

		end = hose->mem_space->start + pci_mem_end;

		if (hose->mem_space->end > end)

			hose->mem_space->end = end;

 	} else if (pci_probe_only &&

	if (pci_probe_only && dev &&

 		   (dev->class >> 8) == PCI_CLASS_BRIDGE_PCI) {

 		pci_read_bridge_bases(bus);

 		pcibios_fixup_device_resources(dev, bus);
@@ -414,13 +396,31 @@ void __init 
common_init_pci(void)

{

	struct pci_controller *hose;

	struct list_head resources;

	struct pci_bus *bus;

	int next_busno;

	int need_domain_info = 0;

	u32 pci_mem_end;

	u32 sg_base;

	unsigned long end;



	/* Scan all of the recorded PCI controllers.  */

	for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {

		bus = pci_scan_bus(next_busno, alpha_mv.pci_ops, hose);

		sg_base = hose->sg_pci ? hose->sg_pci->dma_base : ~0;



		/* Adjust hose mem_space limit to prevent PCI allocations

		   in the iommu windows. */

		pci_mem_end = min((u32)__direct_map_base, sg_base) - 1;

		end = hose->mem_space->start + pci_mem_end;

		if (hose->mem_space->end > end)

			hose->mem_space->end = end;



		INIT_LIST_HEAD(&resources);

		pci_add_resource(&resources, hose->io_space);

		pci_add_resource(&resources, hose->mem_space);



		bus = pci_scan_root_bus(NULL, next_busno, alpha_mv.pci_ops,

					hose, &resources);

		hose->bus = bus;

		hose->need_domain_info = need_domain_info;

		next_busno = bus->subordinate + 1;

arch/arm/common/it8152.c

+6 −3
Original line number Diff line number Diff line
@@ -299,8 +299,8 @@ int __init it8152_pci_setup(int nr, struct pci_sys_data *sys) 
		goto err1;

	}



	sys->resource[0] = &it8152_io;

	sys->resource[1] = &it8152_mem;

	pci_add_resource(&sys->resources, &it8152_io);

	pci_add_resource(&sys->resources, &it8152_mem);



	if (platform_notify || platform_notify_remove) {

		printk(KERN_ERR "PCI: Can't use platform_notify\n");
@@ -327,6 +327,9 @@ int __init it8152_pci_setup(int nr, struct pci_sys_data *sys) 
 */

unsigned int pcibios_max_latency = 255;



/* ITE bridge requires setting latency timer to avoid early bus access

   termination by PCI bus master devices

*/

void pcibios_set_master(struct pci_dev *dev)

{

	u8 lat;
@@ -352,7 +355,7 @@ void pcibios_set_master(struct pci_dev *dev) 


struct pci_bus * __init it8152_pci_scan_bus(int nr, struct pci_sys_data *sys)

{

	return pci_scan_bus(nr, &it8152_ops, sys);

	return pci_scan_root_bus(NULL, nr, &it8152_ops, sys, &sys->resources);

}



EXPORT_SYMBOL(dma_set_coherent_mask);

arch/arm/common/via82c505.c

+2 −1
Original line number Diff line number Diff line
@@ -86,7 +86,8 @@ int __init via82c505_setup(int nr, struct pci_sys_data *sys) 
struct pci_bus * __init via82c505_scan_bus(int nr, struct pci_sys_data *sysdata)

{

	if (nr == 0)

		return pci_scan_bus(0, &via82c505_ops, sysdata);

		return pci_scan_root_bus(NULL, 0, &via82c505_ops, sysdata,

					 &sysdata->resources);



	return NULL;

}

arch/arm/include/asm/mach/pci.h

+1 −1
Original line number Diff line number Diff line
@@ -40,7 +40,7 @@ struct pci_sys_data { 
	u64		mem_offset;	/* bus->cpu memory mapping offset	*/

	unsigned long	io_offset;	/* bus->cpu IO mapping offset		*/

	struct pci_bus	*bus;		/* PCI bus				*/

	struct resource *resource[3];	/* Primary PCI bus resources		*/

	struct list_head resources;	/* root bus resources (apertures)       */

					/* Bridge swizzling			*/

	u8		(*swizzle)(struct pci_dev *, u8 *);

					/* IRQ mapping				*/