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Commit 7ad7f87b authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge remote branch 'nouveau/drm-nouveau-next' of ../drm-nouveau-next into drm-core-next 

* 'nouveau/drm-nouveau-next' of ../drm-nouveau-next:
  drm/nouveau: fix hwmon device binding
  drm/nouveau: create grctx on the fly on all chipsets
  drm/nvc0: fix init without firmware present
  drm/nvc0/pgraph: fix 0x406028/0x405870 init
  drm/nvc0/pgraph: more unit names
  drm/nvc0/pfifo: support for chipsets with only one PSUBFIFO (0xc1)
  drm/nvc0: reserve only subc 0 for kernel use
  drm/nv50: sync up gr data error names with rnn, use for nvc0 also
  drm/nvc0: parse a couple more PGRAPH_INTR
  drm/nvc0: nuke left-over debug messages
  drm/nvc0: kill off a couple more magics
  drm/nouveau: Validate channel indices passed from userspace.
  drm/nouveau: Only select ACPI_VIDEO if its dependencies are met
parents fea6f330 07cfe0e7

drivers/gpu/drm/nouveau/Kconfig

+1 −1
Original line number Diff line number Diff line
@@ -10,7 +10,7 @@ config DRM_NOUVEAU 
	select FB

	select FRAMEBUFFER_CONSOLE if !EMBEDDED

	select FB_BACKLIGHT if DRM_NOUVEAU_BACKLIGHT

	select ACPI_VIDEO if ACPI

	select ACPI_VIDEO if ACPI && X86 && BACKLIGHT_CLASS_DEVICE && VIDEO_OUTPUT_CONTROL && INPUT

	help

	  Choose this option for open-source nVidia support.

drivers/gpu/drm/nouveau/nouveau_channel.c

+17 −18
Original line number Diff line number Diff line
@@ -121,7 +121,6 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret, 
		      uint32_t vram_handle, uint32_t gart_handle)

{

	struct drm_nouveau_private *dev_priv = dev->dev_private;

	struct nouveau_pgraph_engine *pgraph = &dev_priv->engine.graph;

	struct nouveau_fifo_engine *pfifo = &dev_priv->engine.fifo;

	struct nouveau_channel *chan;

	unsigned long flags;
@@ -202,15 +201,6 @@ nouveau_channel_alloc(struct drm_device *dev, struct nouveau_channel **chan_ret, 
	/* disable the fifo caches */

	pfifo->reassign(dev, false);



	/* Create a graphics context for new channel */

	if (dev_priv->card_type < NV_50) {

		ret = pgraph->create_context(chan);

		if (ret) {

			nouveau_channel_put(&chan);

			return ret;

		}

	}



	/* Construct inital RAMFC for new channel */

	ret = pfifo->create_context(chan);

	if (ret) {
@@ -253,6 +243,9 @@ nouveau_channel_get(struct drm_device *dev, struct drm_file *file_priv, int id) 
	struct nouveau_channel *chan;

	unsigned long flags;



	if (unlikely(id < 0 || id >= NOUVEAU_MAX_CHANNEL_NR))

		return ERR_PTR(-EINVAL);



	spin_lock_irqsave(&dev_priv->channels.lock, flags);

	chan = nouveau_channel_get_unlocked(dev_priv->channels.ptr[id]);

	spin_unlock_irqrestore(&dev_priv->channels.lock, flags);
@@ -443,6 +436,7 @@ nouveau_ioctl_fifo_alloc(struct drm_device *dev, void *data, 
	else

		init->pushbuf_domains = NOUVEAU_GEM_DOMAIN_GART;



	if (dev_priv->card_type < NV_C0) {

		init->subchan[0].handle = NvM2MF;

		if (dev_priv->card_type < NV_50)

			init->subchan[0].grclass = 0x0039;
@@ -451,6 +445,11 @@ nouveau_ioctl_fifo_alloc(struct drm_device *dev, void *data, 
		init->subchan[1].handle = NvSw;

		init->subchan[1].grclass = NV_SW;

		init->nr_subchan = 2;

	} else {

		init->subchan[0].handle  = 0x9039;

		init->subchan[0].grclass = 0x9039;

		init->nr_subchan = 1;

	}



	/* Named memory object area */

	ret = drm_gem_handle_create(file_priv, chan->notifier_bo->gem,

drivers/gpu/drm/nouveau/nouveau_drv.h

+1 −0
Original line number Diff line number Diff line
@@ -1191,6 +1191,7 @@ extern int nv50_graph_unload_context(struct drm_device *); 
extern int  nv50_grctx_init(struct nouveau_grctx *);

extern void nv50_graph_tlb_flush(struct drm_device *dev);

extern void nv86_graph_tlb_flush(struct drm_device *dev);

extern struct nouveau_enum nv50_data_error_names[];



/* nvc0_graph.c */

extern int  nvc0_graph_init(struct drm_device *);

drivers/gpu/drm/nouveau/nouveau_fence.c

+1 −1
Original line number Diff line number Diff line
@@ -165,7 +165,7 @@ nouveau_fence_emit(struct nouveau_fence *fence) 
		if (dev_priv->card_type < NV_C0)

			BEGIN_RING(chan, NvSubSw, 0x0050, 1);

		else

			BEGIN_NVC0(chan, 2, NvSubSw, 0x0050, 1);

			BEGIN_NVC0(chan, 2, NvSubM2MF, 0x0050, 1);

	} else {

		BEGIN_RING(chan, NvSubSw, 0x0150, 1);

	}

drivers/gpu/drm/nouveau/nouveau_object.c

+2 −1
Original line number Diff line number Diff line
@@ -651,7 +651,8 @@ nouveau_gpuobj_gr_new(struct nouveau_channel *chan, u32 handle, int class) 
		}

		break;

	case NVOBJ_ENGINE_GR:

		if (dev_priv->card_type >= NV_50 && !chan->ramin_grctx) {

		if ((dev_priv->card_type >= NV_20 && !chan->ramin_grctx) ||

		    (dev_priv->card_type  < NV_20 && !chan->pgraph_ctx)) {

			struct nouveau_pgraph_engine *pgraph =

				&dev_priv->engine.graph;