Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 79deb8e5 authored by Cyrill Gorcunov's avatar Cyrill Gorcunov Committed by Ingo Molnar
Browse files

x86, x2apic: Move the common bits to x2apic.h 



To eliminate code duplication.

Signed-off-by: default avatarCyrill Gorcunov <gorcunov@openvz.org>
Signed-off-by: default avatarSuresh Siddha <suresh.b.siddha@intel.com>
Cc: steiner@sgi.com
Cc: yinghai@kernel.org
Link: http://lkml.kernel.org/r/20110519234637.591426753@sbsiddha-MOBL3.sc.intel.com


Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
parent 9d0fa6c5

arch/x86/include/asm/x2apic.h

0 → 100644
+62 −0
Original line number Diff line number Diff line 
/*

 * Common bits for X2APIC cluster/physical modes.

 */



#ifndef _ASM_X86_X2APIC_H

#define _ASM_X86_X2APIC_H



#include <asm/apic.h>

#include <asm/ipi.h>

#include <linux/cpumask.h>



/*

 * Need to use more than cpu 0, because we need more vectors

 * when MSI-X are used.

 */

static const struct cpumask *x2apic_target_cpus(void)

{

	return cpu_online_mask;

}



static int x2apic_apic_id_registered(void)

{

	return 1;

}



/*

 * For now each logical cpu is in its own vector allocation domain.

 */

static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)

{

	cpumask_clear(retmask);

	cpumask_set_cpu(cpu, retmask);

}



static void

__x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest)

{

	unsigned long cfg = __prepare_ICR(0, vector, dest);

	native_x2apic_icr_write(cfg, apicid);

}



static unsigned int x2apic_get_apic_id(unsigned long id)

{

	return id;

}



static unsigned long x2apic_set_apic_id(unsigned int id)

{

	return id;

}



static int x2apic_phys_pkg_id(int initial_apicid, int index_msb)

{

	return initial_apicid >> index_msb;

}



static void x2apic_send_IPI_self(int vector)

{

	apic_write(APIC_SELF_IPI, vector);

}



#endif /* _ASM_X86_X2APIC_H */

arch/x86/kernel/apic/x2apic_cluster.c

+4 −67
Original line number Diff line number Diff line
@@ -8,8 +8,7 @@ 
#include <linux/cpu.h>



#include <asm/smp.h>

#include <asm/apic.h>

#include <asm/ipi.h>

#include <asm/x2apic.h>



static DEFINE_PER_CPU(u32, x86_cpu_to_logical_apicid);

static DEFINE_PER_CPU(cpumask_var_t, cpus_in_cluster);
@@ -20,37 +19,6 @@ static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) 
	return x2apic_enabled();

}



/*

 * need to use more than cpu 0, because we need more vectors when

 * MSI-X are used.

 */

static const struct cpumask *x2apic_target_cpus(void)

{

	return cpu_online_mask;

}



/*

 * for now each logical cpu is in its own vector allocation domain.

 */

static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)

{

	cpumask_clear(retmask);

	cpumask_set_cpu(cpu, retmask);

}



static void

 __x2apic_send_IPI_dest(unsigned int apicid, int vector, unsigned int dest)

{

	unsigned long cfg;



	cfg = __prepare_ICR(0, vector, dest);



	/*

	 * send the IPI.

	 */

	native_x2apic_icr_write(cfg, apicid);

}



static inline u32 x2apic_cluster(int cpu)

{

	return per_cpu(x86_cpu_to_logical_apicid, cpu) >> 16;
@@ -128,11 +96,6 @@ static void x2apic_send_IPI_all(int vector) 
	__x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);

}



static int x2apic_apic_id_registered(void)

{

	return 1;

}



static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)

{

	/*
@@ -165,32 +128,6 @@ x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask, 
	return per_cpu(x86_cpu_to_logical_apicid, cpu);

}



static unsigned int x2apic_cluster_phys_get_apic_id(unsigned long x)

{

	unsigned int id;



	id = x;

	return id;

}



static unsigned long set_apic_id(unsigned int id)

{

	unsigned long x;



	x = id;

	return x;

}



static int x2apic_cluster_phys_pkg_id(int initial_apicid, int index_msb)

{

	return initial_apicid >> index_msb;

}



static void x2apic_send_IPI_self(int vector)

{

	apic_write(APIC_SELF_IPI, vector);

}



static void init_x2apic_ldr(void)

{

	unsigned int this_cpu = smp_processor_id();
@@ -298,11 +235,11 @@ struct apic apic_x2apic_cluster = { 
	.setup_portio_remap		= NULL,

	.check_phys_apicid_present	= default_check_phys_apicid_present,

	.enable_apic_mode		= NULL,

	.phys_pkg_id			= x2apic_cluster_phys_pkg_id,

	.phys_pkg_id			= x2apic_phys_pkg_id,

	.mps_oem_check			= NULL,



	.get_apic_id			= x2apic_cluster_phys_get_apic_id,

	.set_apic_id			= set_apic_id,

	.get_apic_id			= x2apic_get_apic_id,

	.set_apic_id			= x2apic_set_apic_id,

	.apic_id_mask			= 0xFFFFFFFFu,



	.cpu_mask_to_apicid		= x2apic_cpu_mask_to_apicid,

arch/x86/kernel/apic/x2apic_phys.c

+3 −57
Original line number Diff line number Diff line
@@ -7,8 +7,7 @@ 
#include <linux/dmar.h>



#include <asm/smp.h>

#include <asm/apic.h>

#include <asm/ipi.h>

#include <asm/x2apic.h>



int x2apic_phys;
@@ -27,34 +26,6 @@ static int x2apic_acpi_madt_oem_check(char *oem_id, char *oem_table_id) 
		return 0;

}



/*

 * need to use more than cpu 0, because we need more vectors when

 * MSI-X are used.

 */

static const struct cpumask *x2apic_target_cpus(void)

{

	return cpu_online_mask;

}



static void x2apic_vector_allocation_domain(int cpu, struct cpumask *retmask)

{

	cpumask_clear(retmask);

	cpumask_set_cpu(cpu, retmask);

}



static void __x2apic_send_IPI_dest(unsigned int apicid, int vector,

				   unsigned int dest)

{

	unsigned long cfg;



	cfg = __prepare_ICR(0, vector, dest);



	/*

	 * send the IPI.

	 */

	native_x2apic_icr_write(cfg, apicid);

}



static void

__x2apic_send_IPI_mask(const struct cpumask *mask, int vector, int apic_dest)

{
@@ -97,11 +68,6 @@ static void x2apic_send_IPI_all(int vector) 
	__x2apic_send_IPI_mask(cpu_online_mask, vector, APIC_DEST_ALLINC);

}



static int x2apic_apic_id_registered(void)

{

	return 1;

}



static unsigned int x2apic_cpu_mask_to_apicid(const struct cpumask *cpumask)

{

	/*
@@ -134,26 +100,6 @@ x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask, 
	return per_cpu(x86_cpu_to_apicid, cpu);

}



static unsigned int x2apic_phys_get_apic_id(unsigned long x)

{

	return x;

}



static unsigned long set_apic_id(unsigned int id)

{

	return id;

}



static int x2apic_phys_pkg_id(int initial_apicid, int index_msb)

{

	return initial_apicid >> index_msb;

}



static void x2apic_send_IPI_self(int vector)

{

	apic_write(APIC_SELF_IPI, vector);

}



static void init_x2apic_ldr(void)

{

}
@@ -196,8 +142,8 @@ struct apic apic_x2apic_phys = { 
	.phys_pkg_id			= x2apic_phys_pkg_id,

	.mps_oem_check			= NULL,



	.get_apic_id			= x2apic_phys_get_apic_id,

	.set_apic_id			= set_apic_id,

	.get_apic_id			= x2apic_get_apic_id,

	.set_apic_id			= x2apic_set_apic_id,

	.apic_id_mask			= 0xFFFFFFFFu,



	.cpu_mask_to_apicid		= x2apic_cpu_mask_to_apicid,