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Commit 788a3d6f authored by Sujith's avatar Sujith Committed by John W. Linville
Browse files

ath9k: Fix bug in deciphering channel flags



CHANNEL_CCK flag is set for all 2 Ghz channels, so IS_CHAN_CCK() would
turn out to be true for all channles in that band.
Use IS_CHAN_B() now, which checks the channel mode and not the channel
flags.

Signed-off-by: default avatarSujith <Sujith.Manoharan@atheros.com>
Signed-off-by: default avatarJohn W. Linville <linville@tuxdriver.com>
parent c4288390
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+1 −2
Original line number Diff line number Diff line
@@ -476,12 +476,10 @@ struct ath9k_channel {
       (((_c)->channelFlags & CHANNEL_A_HT20) == CHANNEL_A_HT20) || \
       (((_c)->channelFlags & CHANNEL_A_HT40PLUS) == CHANNEL_A_HT40PLUS) || \
       (((_c)->channelFlags & CHANNEL_A_HT40MINUS) == CHANNEL_A_HT40MINUS))
#define IS_CHAN_B(_c) (((_c)->channelFlags & CHANNEL_B) == CHANNEL_B)
#define IS_CHAN_G(_c) ((((_c)->channelFlags & (CHANNEL_G)) == CHANNEL_G) || \
       (((_c)->channelFlags & CHANNEL_G_HT20) == CHANNEL_G_HT20) || \
       (((_c)->channelFlags & CHANNEL_G_HT40PLUS) == CHANNEL_G_HT40PLUS) || \
       (((_c)->channelFlags & CHANNEL_G_HT40MINUS) == CHANNEL_G_HT40MINUS))
#define IS_CHAN_CCK(_c) (((_c)->channelFlags & CHANNEL_CCK) != 0)
#define IS_CHAN_OFDM(_c) (((_c)->channelFlags & CHANNEL_OFDM) != 0)
#define IS_CHAN_5GHZ(_c) (((_c)->channelFlags & CHANNEL_5GHZ) != 0)
#define IS_CHAN_2GHZ(_c) (((_c)->channelFlags & CHANNEL_2GHZ) != 0)
@@ -490,6 +488,7 @@ struct ath9k_channel {
#define IS_CHAN_QUARTER_RATE(_c) (((_c)->channelFlags & CHANNEL_QUARTER) != 0)

/* These macros check chanmode and not channelFlags */
#define IS_CHAN_B(_c) ((_c)->chanmode == CHANNEL_B)
#define IS_CHAN_HT20(_c) (((_c)->chanmode == CHANNEL_A_HT20) ||	\
			  ((_c)->chanmode == CHANNEL_G_HT20))
#define IS_CHAN_HT40(_c) (((_c)->chanmode == CHANNEL_A_HT40PLUS) ||	\
+6 −5
Original line number Diff line number Diff line
@@ -86,10 +86,11 @@ static u32 ath9k_hw_mac_to_clks(struct ath_hal *ah, u32 usecs)
enum wireless_mode ath9k_hw_chan2wmode(struct ath_hal *ah,
			       const struct ath9k_channel *chan)
{
	if (IS_CHAN_CCK(chan))
		return ATH9K_MODE_11A;
	if (IS_CHAN_B(chan))
		return ATH9K_MODE_11B;
	if (IS_CHAN_G(chan))
		return ATH9K_MODE_11G;

	return ATH9K_MODE_11A;
}

@@ -909,7 +910,7 @@ static void ath9k_hw_init_bb(struct ath_hal *ah,
	u32 synthDelay;

	synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;
	if (IS_CHAN_CCK(chan))
	if (IS_CHAN_B(chan))
		synthDelay = (4 * synthDelay) / 22;
	else
		synthDelay /= 10;
@@ -1647,7 +1648,7 @@ static struct ath9k_channel *ath9k_hw_check_chan(struct ath_hal *ah,
	}

	if (!IS_CHAN_OFDM(chan) &&
	    !IS_CHAN_CCK(chan) &&
	    !IS_CHAN_B(chan) &&
	    !IS_CHAN_HT20(chan) &&
	    !IS_CHAN_HT40(chan)) {
		DPRINTF(ah->ah_sc, ATH_DBG_CHANNEL,
@@ -1711,7 +1712,7 @@ static bool ath9k_hw_channel_change(struct ath_hal *ah,
	}

	synthDelay = REG_READ(ah, AR_PHY_RX_DELAY) & AR_PHY_RX_DELAY_DELAY;
	if (IS_CHAN_CCK(chan))
	if (IS_CHAN_B(chan))
		synthDelay = (4 * synthDelay) / 22;
	else
		synthDelay /= 10;