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Commit 783a28ec authored by Bjorn Helgaas's avatar Bjorn Helgaas
Browse files

Merge branches 'pci/hotplug', 'pci/initdata' and 'pci/misc' into next

* pci/hotplug:
  PCI: pciehp: Stop disabling notifications during init
  PCI: pciehp: Add more Slot Control debug output
  PCI: pciehp: Fix wait time in timeout message

* pci/initdata:
  x86/PCI: Mark PCI BIOS initialization code as such
  x86/PCI: Constify pci_mmcfg_probes[] array
  x86/PCI: Mark constants of pci_mmcfg_nvidia_mcp55() as __initconst
  x86/PCI: Move __init annotation to the correct place
  x86/PCI: Mark DMI tables as initialization data

* pci/misc:
  PCI: Move PCI_VENDOR_ID_VMWARE to pci_ids.h
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+10 −10
Original line number Diff line number Diff line
@@ -81,14 +81,14 @@ struct pci_ops pci_root_ops = {
 */
DEFINE_RAW_SPINLOCK(pci_config_lock);

static int can_skip_ioresource_align(const struct dmi_system_id *d)
static int __init can_skip_ioresource_align(const struct dmi_system_id *d)
{
	pci_probe |= PCI_CAN_SKIP_ISA_ALIGN;
	printk(KERN_INFO "PCI: %s detected, can skip ISA alignment\n", d->ident);
	return 0;
}

static const struct dmi_system_id can_skip_pciprobe_dmi_table[] = {
static const struct dmi_system_id can_skip_pciprobe_dmi_table[] __initconst = {
/*
 * Systems where PCI IO resource ISA alignment can be skipped
 * when the ISA enable bit in the bridge control is not set
@@ -186,7 +186,7 @@ void pcibios_remove_bus(struct pci_bus *bus)
 * on the kernel command line (which was parsed earlier).
 */

static int set_bf_sort(const struct dmi_system_id *d)
static int __init set_bf_sort(const struct dmi_system_id *d)
{
	if (pci_bf_sort == pci_bf_sort_default) {
		pci_bf_sort = pci_dmi_bf;
@@ -195,7 +195,7 @@ static int set_bf_sort(const struct dmi_system_id *d)
	return 0;
}

static void read_dmi_type_b1(const struct dmi_header *dm,
static void __init read_dmi_type_b1(const struct dmi_header *dm,
				    void *private_data)
{
	u8 *d = (u8 *)dm + 4;
@@ -217,7 +217,7 @@ static void read_dmi_type_b1(const struct dmi_header *dm,
	}
}

static int find_sort_method(const struct dmi_system_id *d)
static int __init find_sort_method(const struct dmi_system_id *d)
{
	dmi_walk(read_dmi_type_b1, NULL);

@@ -232,7 +232,7 @@ static int find_sort_method(const struct dmi_system_id *d)
 * Enable renumbering of PCI bus# ranges to reach all PCI busses (Cardbus)
 */
#ifdef __i386__
static int assign_all_busses(const struct dmi_system_id *d)
static int __init assign_all_busses(const struct dmi_system_id *d)
{
	pci_probe |= PCI_ASSIGN_ALL_BUSSES;
	printk(KERN_INFO "%s detected: enabling PCI bus# renumbering"
@@ -241,7 +241,7 @@ static int assign_all_busses(const struct dmi_system_id *d)
}
#endif

static int set_scan_all(const struct dmi_system_id *d)
static int __init set_scan_all(const struct dmi_system_id *d)
{
	printk(KERN_INFO "PCI: %s detected, enabling pci=pcie_scan_all\n",
	       d->ident);
@@ -249,7 +249,7 @@ static int set_scan_all(const struct dmi_system_id *d)
	return 0;
}

static const struct dmi_system_id pciprobe_dmi_table[] = {
static const struct dmi_system_id pciprobe_dmi_table[] __initconst = {
#ifdef __i386__
/*
 * Laptops which need pci=assign-busses to see Cardbus cards
+22 −18
Original line number Diff line number Diff line
@@ -31,7 +31,7 @@ static DEFINE_MUTEX(pci_mmcfg_lock);

LIST_HEAD(pci_mmcfg_list);

static __init void pci_mmconfig_remove(struct pci_mmcfg_region *cfg)
static void __init pci_mmconfig_remove(struct pci_mmcfg_region *cfg)
{
	if (cfg->res.parent)
		release_resource(&cfg->res);
@@ -39,7 +39,7 @@ static __init void pci_mmconfig_remove(struct pci_mmcfg_region *cfg)
	kfree(cfg);
}

static __init void free_all_mmcfg(void)
static void __init free_all_mmcfg(void)
{
	struct pci_mmcfg_region *cfg, *tmp;

@@ -93,7 +93,7 @@ static struct pci_mmcfg_region *pci_mmconfig_alloc(int segment, int start,
	return new;
}

static __init struct pci_mmcfg_region *pci_mmconfig_add(int segment, int start,
static struct pci_mmcfg_region *__init pci_mmconfig_add(int segment, int start,
							int end, u64 addr)
{
	struct pci_mmcfg_region *new;
@@ -125,7 +125,7 @@ struct pci_mmcfg_region *pci_mmconfig_lookup(int segment, int bus)
	return NULL;
}

static const char __init *pci_mmcfg_e7520(void)
static const char *__init pci_mmcfg_e7520(void)
{
	u32 win;
	raw_pci_ops->read(0, 0, PCI_DEVFN(0, 0), 0xce, 2, &win);
@@ -140,7 +140,7 @@ static const char __init *pci_mmcfg_e7520(void)
	return "Intel Corporation E7520 Memory Controller Hub";
}

static const char __init *pci_mmcfg_intel_945(void)
static const char *__init pci_mmcfg_intel_945(void)
{
	u32 pciexbar, mask = 0, len = 0;

@@ -184,7 +184,7 @@ static const char __init *pci_mmcfg_intel_945(void)
	return "Intel Corporation 945G/GZ/P/PL Express Memory Controller Hub";
}

static const char __init *pci_mmcfg_amd_fam10h(void)
static const char *__init pci_mmcfg_amd_fam10h(void)
{
	u32 low, high, address;
	u64 base, msr;
@@ -235,21 +235,25 @@ static const char __init *pci_mmcfg_amd_fam10h(void)
}

static bool __initdata mcp55_checked;
static const char __init *pci_mmcfg_nvidia_mcp55(void)
static const char *__init pci_mmcfg_nvidia_mcp55(void)
{
	int bus;
	int mcp55_mmconf_found = 0;

	static const u32 extcfg_regnum		= 0x90;
	static const u32 extcfg_regsize		= 4;
	static const u32 extcfg_enable_mask	= 1<<31;
	static const u32 extcfg_start_mask	= 0xff<<16;
	static const int extcfg_start_shift	= 16;
	static const u32 extcfg_size_mask	= 0x3<<28;
	static const int extcfg_size_shift	= 28;
	static const int extcfg_sizebus[]	= {0x100, 0x80, 0x40, 0x20};
	static const u32 extcfg_base_mask[]	= {0x7ff8, 0x7ffc, 0x7ffe, 0x7fff};
	static const int extcfg_base_lshift	= 25;
	static const u32 extcfg_regnum __initconst	= 0x90;
	static const u32 extcfg_regsize __initconst	= 4;
	static const u32 extcfg_enable_mask __initconst	= 1 << 31;
	static const u32 extcfg_start_mask __initconst	= 0xff << 16;
	static const int extcfg_start_shift __initconst	= 16;
	static const u32 extcfg_size_mask __initconst	= 0x3 << 28;
	static const int extcfg_size_shift __initconst	= 28;
	static const int extcfg_sizebus[] __initconst	= {
		0x100, 0x80, 0x40, 0x20
	};
	static const u32 extcfg_base_mask[] __initconst	= {
		0x7ff8, 0x7ffc, 0x7ffe, 0x7fff
	};
	static const int extcfg_base_lshift __initconst	= 25;

	/*
	 * do check if amd fam10h already took over
@@ -302,7 +306,7 @@ struct pci_mmcfg_hostbridge_probe {
	const char *(*probe)(void);
};

static struct pci_mmcfg_hostbridge_probe pci_mmcfg_probes[] __initdata = {
static const struct pci_mmcfg_hostbridge_probe pci_mmcfg_probes[] __initconst = {
	{ 0, PCI_DEVFN(0, 0), PCI_VENDOR_ID_INTEL,
	  PCI_DEVICE_ID_INTEL_E7520_MCH, pci_mmcfg_e7520 },
	{ 0, PCI_DEVFN(0, 0), PCI_VENDOR_ID_INTEL,
+4 −4
Original line number Diff line number Diff line
@@ -79,13 +79,13 @@ union bios32 {
static struct {
	unsigned long address;
	unsigned short segment;
} bios32_indirect = { 0, __KERNEL_CS };
} bios32_indirect __initdata = { 0, __KERNEL_CS };

/*
 * Returns the entry point for the given service, NULL on error
 */

static unsigned long bios32_service(unsigned long service)
static unsigned long __init bios32_service(unsigned long service)
{
	unsigned char return_code;	/* %al */
	unsigned long address;		/* %ebx */
@@ -124,7 +124,7 @@ static struct {

static int pci_bios_present;

static int check_pcibios(void)
static int __init check_pcibios(void)
{
	u32 signature, eax, ebx, ecx;
	u8 status, major_ver, minor_ver, hw_mech;
@@ -312,7 +312,7 @@ static const struct pci_raw_ops pci_bios_access = {
 * Try to find PCI BIOS.
 */

static const struct pci_raw_ops *pci_find_bios(void)
static const struct pci_raw_ops *__init pci_find_bios(void)
{
	union bios32 *check;
	unsigned char sum;
+0 −1
Original line number Diff line number Diff line
@@ -35,7 +35,6 @@
/*
 * PCI device IDs.
 */
#define PCI_VENDOR_ID_VMWARE            0x15AD
#define PCI_DEVICE_ID_VMWARE_SVGA2      0x0405

/*
+0 −1
Original line number Diff line number Diff line
@@ -35,7 +35,6 @@
#include "vmci_driver.h"
#include "vmci_event.h"

#define PCI_VENDOR_ID_VMWARE		0x15AD
#define PCI_DEVICE_ID_VMWARE_VMCI	0x0740

#define VMCI_UTIL_NUM_RESOURCES 1
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