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Commit 779e7d41 authored by Manuel Lauss's avatar Manuel Lauss Committed by Ralf Baechle
Browse files

MIPS: make cp0 counter clocksource/event usable as fallback. 



The current mips clock build infrastructure lets a system only use
either the MIPS cp0 counter or a SoC specific timer as a clocksource /
clockevent device.

This patch renames the core cp0 counter clocksource / clockevent functions
from mips_* to r4k_* and updates the wrappers in asm-mips/time.h to
call these renamed functions instead.

Chips which can detect whether it is safe to use a chip-specific timer
can now fall back on the cp0 counter if necessary and possible
(e.g. Alchemy with a follow-on patch).

Existing behaviour is not changed in any way.

Signed-off-by: default avatarManuel Lauss <mano@roarinelk.homelinux.net>
Signed-off-by: default avatarRalf Baechle <ralf@linux-mips.org>
parent 074cf656

arch/mips/Kconfig

+8 −0
Original line number Diff line number Diff line
@@ -721,7 +721,11 @@ config CEVT_DS1287 
config CEVT_GT641XX

	bool



config CEVT_R4K_LIB

	bool



config CEVT_R4K

	select CEVT_R4K_LIB

	bool



config CEVT_SB1250
@@ -736,7 +740,11 @@ config CSRC_BCM1480 
config CSRC_IOASIC

	bool



config CSRC_R4K_LIB

	bool



config CSRC_R4K

	select CSRC_R4K_LIB

	bool



config CSRC_SB1250

arch/mips/include/asm/time.h

+16 −8
Original line number Diff line number Diff line
@@ -50,27 +50,35 @@ extern int (*perf_irq)(void); 
/*

 * Initialize the calling CPU's compare interrupt as clockevent device

 */

#ifdef CONFIG_CEVT_R4K

extern int mips_clockevent_init(void);

#ifdef CONFIG_CEVT_R4K_LIB

extern unsigned int __weak get_c0_compare_int(void);

#else

extern int r4k_clockevent_init(void);

#endif



static inline int mips_clockevent_init(void)

{

#ifdef CONFIG_CEVT_R4K

	return r4k_clockevent_init();

#else

	return -ENXIO;

}

#endif

}



/*

 * Initialize the count register as a clocksource

 */

#ifdef CONFIG_CSRC_R4K

extern int init_mips_clocksource(void);

#else

#ifdef CONFIG_CSRC_R4K_LIB

extern int init_r4k_clocksource(void);

#endif



static inline int init_mips_clocksource(void)

{

#ifdef CONFIG_CSRC_R4K

	return init_r4k_clocksource();

#else

	return 0;

}

#endif

}



extern void clocksource_set_clock(struct clocksource *cs, unsigned int clock);

extern void clockevent_set_clock(struct clock_event_device *cd,

arch/mips/kernel/Makefile

+2 −2
Original line number Diff line number Diff line
@@ -9,7 +9,7 @@ obj-y += cpu-probe.o branch.o entry.o genex.o irq.o process.o \ 
		   time.o topology.o traps.o unaligned.o watch.o



obj-$(CONFIG_CEVT_BCM1480)	+= cevt-bcm1480.o

obj-$(CONFIG_CEVT_R4K)		+= cevt-r4k.o

obj-$(CONFIG_CEVT_R4K_LIB)	+= cevt-r4k.o

obj-$(CONFIG_MIPS_MT_SMTC)	+= cevt-smtc.o

obj-$(CONFIG_CEVT_DS1287)	+= cevt-ds1287.o

obj-$(CONFIG_CEVT_GT641XX)	+= cevt-gt641xx.o
@@ -17,7 +17,7 @@ obj-$(CONFIG_CEVT_SB1250) += cevt-sb1250.o 
obj-$(CONFIG_CEVT_TXX9)		+= cevt-txx9.o

obj-$(CONFIG_CSRC_BCM1480)	+= csrc-bcm1480.o

obj-$(CONFIG_CSRC_IOASIC)	+= csrc-ioasic.o

obj-$(CONFIG_CSRC_R4K)		+= csrc-r4k.o

obj-$(CONFIG_CSRC_R4K_LIB)	+= csrc-r4k.o

obj-$(CONFIG_CSRC_SB1250)	+= csrc-sb1250.o

obj-$(CONFIG_SYNC_R4K)		+= sync-r4k.o

arch/mips/kernel/cevt-r4k.c

+1 −1
Original line number Diff line number Diff line
@@ -160,7 +160,7 @@ int c0_compare_int_usable(void) 


#ifndef CONFIG_MIPS_MT_SMTC



int __cpuinit mips_clockevent_init(void)

int __cpuinit r4k_clockevent_init(void)

{

	uint64_t mips_freq = mips_hpt_frequency;

	unsigned int cpu = smp_processor_id();

arch/mips/kernel/csrc-r4k.c

+1 −1
Original line number Diff line number Diff line
@@ -22,7 +22,7 @@ static struct clocksource clocksource_mips = { 
	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,

};



int __init init_mips_clocksource(void)

int __init init_r4k_clocksource(void)

{

	if (!cpu_has_counter || !mips_hpt_frequency)

		return -ENXIO;