Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 778307d3 authored by Mike Frysinger's avatar Mike Frysinger Committed by Bryan Wu
Browse files

Blackfin arch: remove support for Anomaly 05000125 as it doesnt exist on any... 


Blackfin arch: remove support for Anomaly 05000125 as it doesnt exist on any supported processor/silicon

Signed-off-by: default avatarMike Frysinger <vapier.adi@gmail.com>
Signed-off-by: default avatarBryan Wu <cooloney@kernel.org>
parent d6a29891

arch/blackfin/mach-bf527/head.S

+0 −19
Original line number Original line Diff line number Diff line
@@ -105,17 +105,8 @@ ENTRY(__start) 
	R1 = [p0];

	R1 = [p0];

	R0 = ~ENICPLB;

	R0 = ~ENICPLB;

	R0 = R0 & R1;

	R0 = R0 & R1;



	/* Anomaly 05000125 */

#if ANOMALY_05000125

	CLI R2;

	SSYNC;

#endif

	[p0] = R0;

	[p0] = R0;

	SSYNC;

	SSYNC;

#if ANOMALY_05000125

	STI R2;

#endif





	/* Turn off the dcache */

	/* Turn off the dcache */

	p0.l = LO(DMEM_CONTROL);

	p0.l = LO(DMEM_CONTROL);
@@ -123,18 +114,8 @@ ENTRY(__start) 
	R1 = [p0];

	R1 = [p0];

	R0 = ~ENDCPLB;

	R0 = ~ENDCPLB;

	R0 = R0 & R1;

	R0 = R0 & R1;



	/* Anomaly 05000125 */

#if ANOMALY_05000125

	CLI R2;

	SSYNC;

#endif

	[p0] = R0;

	[p0] = R0;

	SSYNC;

	SSYNC;

#if ANOMALY_05000125

	STI R2;

#endif







#if defined(CONFIG_BF527)

#if defined(CONFIG_BF527)

	p0.h = hi(EMAC_SYSTAT);

	p0.h = hi(EMAC_SYSTAT);

arch/blackfin/mach-bf533/head.S

+0 −18
Original line number Original line Diff line number Diff line
@@ -116,17 +116,8 @@ ENTRY(__start) 
	R1 = [p0];

	R1 = [p0];

	R0 = ~ENICPLB;

	R0 = ~ENICPLB;

	R0 = R0 & R1;

	R0 = R0 & R1;



	/* Anomaly 05000125 */

#if ANOMALY_05000125

	CLI R2;

	SSYNC;

#endif

	[p0] = R0;

	[p0] = R0;

	SSYNC;

	SSYNC;

#if ANOMALY_05000125

	STI R2;

#endif





	/* Turn off the dcache */

	/* Turn off the dcache */

	p0.l = LO(DMEM_CONTROL);

	p0.l = LO(DMEM_CONTROL);
@@ -134,17 +125,8 @@ ENTRY(__start) 
	R1 = [p0];

	R1 = [p0];

	R0 = ~ENDCPLB;

	R0 = ~ENDCPLB;

	R0 = R0 & R1;

	R0 = R0 & R1;



	/* Anomaly 05000125 */

#if ANOMALY_05000125

	CLI R2;

	SSYNC;

#endif

	[p0] = R0;

	[p0] = R0;

	SSYNC;

	SSYNC;

#if ANOMALY_05000125

	STI R2;

#endif





	/* Initialise UART - when booting from u-boot, the UART is not disabled

	/* Initialise UART - when booting from u-boot, the UART is not disabled

	 * so if we dont initalize here, our serial console gets hosed */

	 * so if we dont initalize here, our serial console gets hosed */

arch/blackfin/mach-bf537/head.S

+1 −38
Original line number Original line Diff line number Diff line
@@ -105,17 +105,8 @@ ENTRY(__start) 
	R1 = [p0];

	R1 = [p0];

	R0 = ~ENICPLB;

	R0 = ~ENICPLB;

	R0 = R0 & R1;

	R0 = R0 & R1;



	/* Anomaly 05000125 */

#if ANOMALY_05000125

	CLI R2;

	SSYNC;

#endif

	[p0] = R0;

	[p0] = R0;

	SSYNC;

	SSYNC;

#if ANOMALY_05000125

	STI R2;

#endif





	/* Turn off the dcache */

	/* Turn off the dcache */

	p0.l = LO(DMEM_CONTROL);

	p0.l = LO(DMEM_CONTROL);
@@ -123,48 +114,20 @@ ENTRY(__start) 
	R1 = [p0];

	R1 = [p0];

	R0 = ~ENDCPLB;

	R0 = ~ENDCPLB;

	R0 = R0 & R1;

	R0 = R0 & R1;



	/* Anomaly 05000125 */

#if ANOMALY_05000125

	CLI R2;

	SSYNC;

#endif

	[p0] = R0;

	[p0] = R0;

	SSYNC;

	SSYNC;

#if ANOMALY_05000125

	STI R2;

#endif





	/* Initialise General-Purpose I/O Modules on BF537 */

	/* Initialise General-Purpose I/O Modules on BF537 */

	/* Rev 0.0 Anomaly 05000212 - PORTx_FER,

	 * PORT_MUX Registers Do Not accept "writes" correctly:

	 */

	p0.h = hi(BFIN_PORT_MUX);

	p0.h = hi(BFIN_PORT_MUX);

	p0.l = lo(BFIN_PORT_MUX);

	p0.l = lo(BFIN_PORT_MUX);

#if ANOMALY_05000212

	R0.L = W[P0]; /* Read */

	SSYNC;

#endif

	R0 = (PGDE_UART | PFTE_UART)(Z);

	R0 = (PGDE_UART | PFTE_UART)(Z);

#if ANOMALY_05000212

	W[P0] = R0.L; /* Write */

	SSYNC;

#endif

	W[P0] = R0.L; /* Enable both UARTS */

	W[P0] = R0.L; /* Enable both UARTS */

	SSYNC;

	SSYNC;





	/* Enable peripheral function of PORTF for UART0 and UART1 */

	p0.h = hi(PORTF_FER);

	p0.h = hi(PORTF_FER);

	p0.l = lo(PORTF_FER);

	p0.l = lo(PORTF_FER);

#if ANOMALY_05000212

	R0.L = W[P0]; /* Read */

	SSYNC;

#endif

	R0 = 0x000F(Z);

	R0 = 0x000F(Z);

#if ANOMALY_05000212

	W[P0] = R0.L; /* Write */

	SSYNC;

#endif

	/* Enable peripheral function of PORTF for UART0 and UART1 */

	W[P0] = R0.L;

	W[P0] = R0.L;

	SSYNC;

	SSYNC;

arch/blackfin/mach-bf561/head.S

+0 −17
Original line number Original line Diff line number Diff line
@@ -105,16 +105,8 @@ ENTRY(__start) 
	R1 = [p0];

	R1 = [p0];

	R0 = ~ENICPLB;

	R0 = ~ENICPLB;

	R0 = R0 & R1;

	R0 = R0 & R1;



#if ANOMALY_05000125

	CLI R2;

	SSYNC;

#endif

	[p0] = R0;

	[p0] = R0;

	SSYNC;

	SSYNC;

#if ANOMALY_05000125

	STI R2;

#endif





	/* Turn off the dcache */

	/* Turn off the dcache */

	p0.l = LO(DMEM_CONTROL);

	p0.l = LO(DMEM_CONTROL);
@@ -122,17 +114,8 @@ ENTRY(__start) 
	R1 = [p0];

	R1 = [p0];

	R0 = ~ENDCPLB;

	R0 = ~ENDCPLB;

	R0 = R0 & R1;

	R0 = R0 & R1;



	/* Anomaly 05000125 */

#if ANOMALY_05000125

	CLI R2;

	SSYNC;

#endif

	[p0] = R0;

	[p0] = R0;

	SSYNC;

	SSYNC;

#if ANOMALY_05000125

	STI R2;

#endif





	/* Initialise UART - when booting from u-boot, the UART is not disabled

	/* Initialise UART - when booting from u-boot, the UART is not disabled

	 * so if we dont initalize here, our serial console gets hosed */

	 * so if we dont initalize here, our serial console gets hosed */

arch/blackfin/mach-common/Makefile

+1 −1
Original line number Original line Diff line number Diff line
@@ -3,7 +3,7 @@ 
#

#





obj-y := \

obj-y := \

	cache.o cacheinit.o entry.o \

	cache.o entry.o \

	interrupt.o lock.o irqpanic.o arch_checks.o ints-priority.o

	interrupt.o lock.o irqpanic.o arch_checks.o ints-priority.o





obj-$(CONFIG_PM)          += pm.o dpmc_modes.o

obj-$(CONFIG_PM)          += pm.o dpmc_modes.o