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Commit 770039fe authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge branch 'tegra/dma-reset-rework' into next/dt 



Bringing in the tegra dma/reset framework cleanup as a base for the DT changes.

* tegra/dma-reset-rework: (320 commits)
  spi: tegra: checking for ERR_PTR instead of NULL
  ASoC: tegra: update module reset list for Tegra124
  clk: tegra: remove bogus PCIE_XCLK
  clk: tegra: remove legacy reset APIs
  ARM: tegra: remove legacy DMA entries from DT
  ARM: tegra: remove legacy clock entries from DT
  USB: EHCI: tegra: use reset framework
  Input: tegra-kbc - use reset framework
  serial: tegra: convert to standard DMA DT bindings
  serial: tegra: use reset framework
  spi: tegra: convert to standard DMA DT bindings
  spi: tegra: use reset framework
  staging: nvec: use reset framework
  i2c: tegra: use reset framework
  ASoC: tegra: convert to standard DMA DT bindings
  ASoC: tegra: allocate AHUB FIFO during probe() not startup()
  ASoC: tegra: call pm_runtime APIs around register accesses
  ASoC: tegra: use reset framework
  dma: tegra: register as an OF DMA controller
  dma: tegra: use reset framework
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 954e198e 8a0a1af3

Documentation/devicetree/bindings/arm/omap/mpu.txt

+8 −0
Original line number Diff line number Diff line
@@ -7,10 +7,18 @@ The MPU contain CPUs, GIC, L2 cache and a local PRCM. 
Required properties:

- compatible : Should be "ti,omap3-mpu" for OMAP3

               Should be "ti,omap4-mpu" for OMAP4

	       Should be "ti,omap5-mpu" for OMAP5

- ti,hwmods: "mpu"



Examples:



- For an OMAP5 SMP system:



mpu {

    compatible = "ti,omap5-mpu";

    ti,hwmods = "mpu"

};



- For an OMAP4 SMP system:



mpu {

Documentation/devicetree/bindings/arm/pmu.txt

+1 −0
Original line number Diff line number Diff line
@@ -7,6 +7,7 @@ representation in the device tree should be done as under:- 
Required properties:



- compatible : should be one of

	"arm,armv8-pmuv3"

	"arm,cortex-a15-pmu"

	"arm,cortex-a9-pmu"

	"arm,cortex-a8-pmu"

Documentation/devicetree/bindings/arm/samsung/exynos-adc.txt

+1 −1
Original line number Diff line number Diff line
@@ -49,7 +49,7 @@ adc@12D10000 { 
	/* NTC thermistor is a hwmon device */

	ncp15wb473@0 {

		compatible = "ntc,ncp15wb473";

		pullup-uV = <1800000>;

		pullup-uv = <1800000>;

		pullup-ohm = <47000>;

		pulldown-ohm = <0>;

		io-channels = <&adc 4>;

Documentation/devicetree/bindings/arm/tegra/nvidia,tegra20-pmc.txt

+1 −0
Original line number Diff line number Diff line
@@ -9,6 +9,7 @@ Required properties: 
- compatible : Should contain "nvidia,tegra<chip>-pmc".

- reg : Offset and length of the register set for the device

- clocks : Must contain an entry for each entry in clock-names.

  See ../clocks/clock-bindings.txt for details.

- clock-names : Must include the following entries:

  "pclk" (The Tegra clock of that name),

  "clk32k_in" (The 32KHz clock input to Tegra).

Documentation/devicetree/bindings/clock/exynos4-clock.txt

+1 −1
Original line number Diff line number Diff line
@@ -6,7 +6,7 @@ SoC's in the Exynos4 family. 


Required Properties:



- comptible: should be one of the following.

- compatible: should be one of the following.

  - "samsung,exynos4210-clock" - controller compatible with Exynos4210 SoC.

  - "samsung,exynos4412-clock" - controller compatible with Exynos4412 SoC.