Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 76d9c6c1 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus 

Pull MIPS fixes from Ralf Baechle:
 "Another round of fixes for 4.5:

   - Fix the use of an undocumented syntactial variant of the .type
     pseudo op which is not supported by the LLVM assembler.
   - Fix invalid initialization on S-cache-less systems.
   - Fix possible information leak from the kernel stack for SIGFPE.
   - Fix handling of copy_{from,to}_user() return value in KVM
   - Fix the last instance of irq_to_gpio() which now was causing build
     errors"

* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus:
  MIPS: traps: Fix SIGFPE information leak from `do_ov' and `do_trap_or_bp'
  MIPS: kvm: Fix ioctl error handling.
  MIPS: scache: Fix scache init with invalid line size.
  MIPS: Avoid variant of .type unsupported by LLVM Assembler
  MIPS: jz4740: Fix surviving instance of irq_to_gpio()
parents b8155fe1 e723e3f7

arch/mips/jz4740/gpio.c

+1 −1
Original line number Diff line number Diff line
@@ -270,7 +270,7 @@ uint32_t jz_gpio_port_get_value(int port, uint32_t mask) 
}

EXPORT_SYMBOL(jz_gpio_port_get_value);



#define IRQ_TO_BIT(irq) BIT(irq_to_gpio(irq) & 0x1f)

#define IRQ_TO_BIT(irq) BIT((irq - JZ4740_IRQ_GPIO(0)) & 0x1f)



static void jz_gpio_check_trigger_both(struct jz_gpio_chip *chip, unsigned int irq)

{

arch/mips/kernel/r2300_fpu.S

+1 −1
Original line number Diff line number Diff line
@@ -125,7 +125,7 @@ LEAF(_restore_fp_context) 
	END(_restore_fp_context)

	.set	reorder



	.type	fault@function

	.type	fault, @function

	.ent	fault

fault:	li	v0, -EFAULT

	jr	ra

arch/mips/kernel/r4k_fpu.S

+1 −1
Original line number Diff line number Diff line
@@ -358,7 +358,7 @@ LEAF(_restore_msa_all_upper) 


	.set	reorder



	.type	fault@function

	.type	fault, @function

	.ent	fault

fault:	li	v0, -EFAULT				# failure

	jr	ra

arch/mips/kernel/traps.c

+6 −7
Original line number Diff line number Diff line
@@ -690,15 +690,15 @@ static int simulate_sync(struct pt_regs *regs, unsigned int opcode) 
asmlinkage void do_ov(struct pt_regs *regs)

{

	enum ctx_state prev_state;

	siginfo_t info;

	siginfo_t info = {

		.si_signo = SIGFPE,

		.si_code = FPE_INTOVF,

		.si_addr = (void __user *)regs->cp0_epc,

	};



	prev_state = exception_enter();

	die_if_kernel("Integer overflow", regs);



	info.si_code = FPE_INTOVF;

	info.si_signo = SIGFPE;

	info.si_errno = 0;

	info.si_addr = (void __user *) regs->cp0_epc;

	force_sig_info(SIGFPE, &info, current);

	exception_exit(prev_state);

}
@@ -874,7 +874,7 @@ asmlinkage void do_fpe(struct pt_regs *regs, unsigned long fcr31) 
void do_trap_or_bp(struct pt_regs *regs, unsigned int code,

	const char *str)

{

	siginfo_t info;

	siginfo_t info = { 0 };

	char b[40];



#ifdef CONFIG_KGDB_LOW_LEVEL_TRAP
@@ -903,7 +903,6 @@ void do_trap_or_bp(struct pt_regs *regs, unsigned int code, 
		else

			info.si_code = FPE_INTOVF;

		info.si_signo = SIGFPE;

		info.si_errno = 0;

		info.si_addr = (void __user *) regs->cp0_epc;

		force_sig_info(SIGFPE, &info, current);

		break;

arch/mips/mm/sc-mips.c

+9 −4
Original line number Diff line number Diff line
@@ -164,10 +164,12 @@ static int __init mips_sc_probe_cm3(void) 


	sets = cfg & CM_GCR_L2_CONFIG_SET_SIZE_MSK;

	sets >>= CM_GCR_L2_CONFIG_SET_SIZE_SHF;

	if (sets)

		c->scache.sets = 64 << sets;



	line_sz = cfg & CM_GCR_L2_CONFIG_LINE_SIZE_MSK;

	line_sz >>= CM_GCR_L2_CONFIG_LINE_SIZE_SHF;

	if (line_sz)

		c->scache.linesz = 2 << line_sz;



	assoc = cfg & CM_GCR_L2_CONFIG_ASSOC_MSK;
@@ -176,11 +178,14 @@ static int __init mips_sc_probe_cm3(void) 
	c->scache.waysize = c->scache.sets * c->scache.linesz;

	c->scache.waybit = __ffs(c->scache.waysize);



	if (c->scache.linesz) {

		c->scache.flags &= ~MIPS_CACHE_NOT_PRESENT;



		return 1;

	}



	return 0;

}



static inline int __init mips_sc_probe(void)

{

	struct cpuinfo_mips *c = &current_cpu_data;