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Commit 76cdd44c authored by Heiko Carstens's avatar Heiko Carstens Committed by Martin Schwidefsky
Browse files

s390/facilities: always use lowcore's stfle field for storing facility bits 



head.s contains an stfle instruction which stores it result at the
storage location that is assigned to the stfl instruction.

This is currently no problem, since we only care about one double
word. However if the number of double words in the ALS bitfield grows
the current code is not very stable.

E.g. before issuing the stfle command the memory to which it stores
must be cleared, since the instruction may or may not clear memory
contents where no bits are set.

In order to simplify the code a bit always use the storage location
that we reserved for the stfle result.

Signed-off-by: default avatarHeiko Carstens <heiko.carstens@de.ibm.com>
Signed-off-by: default avatarMartin Schwidefsky <schwidefsky@de.ibm.com>
parent 9552a66f

arch/s390/kernel/asm-offsets.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -120,6 +120,7 @@ int main(void) 
	OFFSET(__LC_IO_INT_PARM, _lowcore, io_int_parm);

	OFFSET(__LC_IO_INT_PARM, _lowcore, io_int_parm);

	OFFSET(__LC_IO_INT_WORD, _lowcore, io_int_word);

	OFFSET(__LC_IO_INT_WORD, _lowcore, io_int_word);

	OFFSET(__LC_STFL_FAC_LIST, _lowcore, stfl_fac_list);

	OFFSET(__LC_STFL_FAC_LIST, _lowcore, stfl_fac_list);

	OFFSET(__LC_STFLE_FAC_LIST, _lowcore, stfle_fac_list);

	OFFSET(__LC_MCCK_CODE, _lowcore, mcck_interruption_code);

	OFFSET(__LC_MCCK_CODE, _lowcore, mcck_interruption_code);

	OFFSET(__LC_MCCK_FAIL_STOR_ADDR, _lowcore, failing_storage_address);

	OFFSET(__LC_MCCK_FAIL_STOR_ADDR, _lowcore, failing_storage_address);

	OFFSET(__LC_LAST_BREAK, _lowcore, breaking_event_addr);

	OFFSET(__LC_LAST_BREAK, _lowcore, breaking_event_addr);

arch/s390/kernel/head.S

+5 −5
Original line number Original line Diff line number Diff line
@@ -300,19 +300,19 @@ ENTRY(startup_kdump) 
	xc	0x200(256),0x200	# partially clear lowcore

	xc	0x200(256),0x200	# partially clear lowcore

	xc	0x300(256),0x300

	xc	0x300(256),0x300

	xc	0xe00(256),0xe00

	xc	0xe00(256),0xe00

	xc	0xf00(256),0xf00

	lctlg	%c0,%c15,0x200(%r0)	# initialize control registers

	lctlg	%c0,%c15,0x200(%r0)	# initialize control registers

	stck	__LC_LAST_UPDATE_CLOCK

	stck	__LC_LAST_UPDATE_CLOCK

	spt	6f-.LPG0(%r13)

	spt	6f-.LPG0(%r13)

	mvc	__LC_LAST_UPDATE_TIMER(8),6f-.LPG0(%r13)

	mvc	__LC_LAST_UPDATE_TIMER(8),6f-.LPG0(%r13)

	xc	__LC_STFL_FAC_LIST(8),__LC_STFL_FAC_LIST

	# check capabilities against MARCH_{G5,Z900,Z990,Z9_109,Z10}

	stfl	0(%r0)			# store facilities @ __LC_STFL_FAC_LIST

	stfl	0(%r0)			# store facilities @ __LC_STFL_FAC_LIST

	tm	__LC_STFL_FAC_LIST,0x01	# stfle available ?

	mvc	__LC_STFLE_FAC_LIST(4),__LC_STFL_FAC_LIST

	tm	__LC_STFLE_FAC_LIST,0x01	# stfle available ?

	jz	0f

	jz	0f

	la	%r0,1

	la	%r0,1

	.insn	s,0xb2b00000,__LC_STFL_FAC_LIST	# store facility list extended

	.insn	s,0xb2b00000,__LC_STFLE_FAC_LIST # store facility list extended

	# verify if all required facilities are supported by the machine

	# verify if all required facilities are supported by the machine

0:	la	%r1,__LC_STFL_FAC_LIST

0:	la	%r1,__LC_STFLE_FAC_LIST

	la	%r2,3f+8-.LPG0(%r13)

	la	%r2,3f+8-.LPG0(%r13)

	l	%r3,0(%r2)

	l	%r3,0(%r2)

1:	l	%r0,0(%r1)

1:	l	%r0,0(%r1)

arch/s390/kernel/head64.S

+1 −1
Original line number Original line Diff line number Diff line
@@ -16,7 +16,7 @@ 




__HEAD

__HEAD

ENTRY(startup_continue)

ENTRY(startup_continue)

	tm	__LC_STFL_FAC_LIST+6,0x80	# LPP available ?

	tm	__LC_STFLE_FAC_LIST+6,0x80	# LPP available ?

	jz	0f

	jz	0f

	xc	__LC_LPP+1(7,0),__LC_LPP+1	# clear lpp and current_pid

	xc	__LC_LPP+1(7,0),__LC_LPP+1	# clear lpp and current_pid

	mvi	__LC_LPP,0x80			#   and set LPP_MAGIC

	mvi	__LC_LPP,0x80			#   and set LPP_MAGIC