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Commit 76422dbf authored by Fabio Estevam's avatar Fabio Estevam Committed by Sascha Hauer
Browse files

ARM: mx51: Print silicon revision on boot 



Having the silicon revision to appear on the boot log is a useful information.

MX31 and MX35 already show the silicon revision on boot.

Add support for displaying such information for MX51 as well.

Tested on a MX51EVK, where it shows:

CPU identified as i.MX51, silicon rev 3.0

Signed-off-by: default avatarFabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: default avatarSascha Hauer <s.hauer@pengutronix.de>
parent 6447f55d

arch/arm/mach-mx5/clock-mx51-mx53.c

+1 −0
Original line number Diff line number Diff line
@@ -1511,6 +1511,7 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc, 
	clk_enable(&iim_clk);

	mx51_revision();

	clk_disable(&iim_clk);

	mx51_display_revision();



	/* move usb_phy_clk to 24MHz */

	clk_set_parent(&usb_phy1_clk, &osc_clk);

arch/arm/mach-mx5/cpu.c

+20 −0
Original line number Diff line number Diff line
@@ -51,6 +51,26 @@ int mx51_revision(void) 
}

EXPORT_SYMBOL(mx51_revision);



void mx51_display_revision(void)

{

	int rev;

	char *srev;

	rev = mx51_revision();



	switch (rev) {

	case IMX_CHIP_REVISION_2_0:

		srev = IMX_CHIP_REVISION_2_0_STRING;

		break;

	case IMX_CHIP_REVISION_3_0:

		srev = IMX_CHIP_REVISION_3_0_STRING;

		break;

	default:

		srev = IMX_CHIP_REVISION_UNKNOWN_STRING;

	}

	printk(KERN_INFO "CPU identified as i.MX51, silicon rev %s\n", srev);

}

EXPORT_SYMBOL(mx51_display_revision);



#ifdef CONFIG_NEON



/*

arch/arm/plat-mxc/include/mach/mx51.h

+1 −0
Original line number Diff line number Diff line
@@ -347,6 +347,7 @@ 


#if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS)

extern int mx51_revision(void);

extern void mx51_display_revision(void);

#endif



/* tape-out 1 defines */

arch/arm/plat-mxc/include/mach/mxc.h

+14 −0
Original line number Diff line number Diff line
@@ -51,6 +51,20 @@ 
#define IMX_CHIP_REVISION_3_3		0x33

#define IMX_CHIP_REVISION_UNKNOWN	0xff



#define IMX_CHIP_REVISION_1_0_STRING		"1.0"

#define IMX_CHIP_REVISION_1_1_STRING		"1.1"

#define IMX_CHIP_REVISION_1_2_STRING		"1.2"

#define IMX_CHIP_REVISION_1_3_STRING		"1.3"

#define IMX_CHIP_REVISION_2_0_STRING		"2.0"

#define IMX_CHIP_REVISION_2_1_STRING		"2.1"

#define IMX_CHIP_REVISION_2_2_STRING		"2.2"

#define IMX_CHIP_REVISION_2_3_STRING		"2.3"

#define IMX_CHIP_REVISION_3_0_STRING		"3.0"

#define IMX_CHIP_REVISION_3_1_STRING		"3.1"

#define IMX_CHIP_REVISION_3_2_STRING		"3.2"

#define IMX_CHIP_REVISION_3_3_STRING		"3.3"

#define IMX_CHIP_REVISION_UNKNOWN_STRING	"unknown"



#ifndef __ASSEMBLY__

extern unsigned int __mxc_cpu_type;

#endif