i2c: rcar: Revert the latest refactoring series (75ecc64e) · Commits · e / devices / android_kernel_teracube_2e

drivers/i2c/busses/i2c-rcar.c

+122 −71

Original line number	Original line	Diff line number	Diff line
	/*		/*
	* Driver for the Renesas RCar I2C unit		* Driver for the Renesas RCar I2C unit
	*		*
	* Copyright (C) 2014-15 Wolfram Sang <wsa@sang-engineering.com>		* Copyright (C) 2014 Wolfram Sang <wsa@sang-engineering.com>
	* Copyright (C) 2011-2015 Renesas Electronics Corporation
	*		*
	* Copyright (C) 2012-14 Renesas Solutions Corp.		* Copyright (C) 2012-14 Renesas Solutions Corp.
	* Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>		* Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
	@@ -10,6 +9,9 @@
	* This file is based on the drivers/i2c/busses/i2c-sh7760.c		* This file is based on the drivers/i2c/busses/i2c-sh7760.c
	* (c) 2005-2008 MSC Vertriebsges.m.b.H, Manuel Lauss <mlau@msc-ge.com>		* (c) 2005-2008 MSC Vertriebsges.m.b.H, Manuel Lauss <mlau@msc-ge.com>
	*		*
			* This file used out-of-tree driver i2c-rcar.c
			* Copyright (C) 2011-2012 Renesas Electronics Corporation
			*
	* This program is free software; you can redistribute it and/or modify		* This program is free software; you can redistribute it and/or modify
	* it under the terms of the GNU General Public License as published by		* it under the terms of the GNU General Public License as published by
	* the Free Software Foundation; version 2 of the License.		* the Free Software Foundation; version 2 of the License.
	@@ -31,6 +33,7 @@
	#include <linux/platform_device.h>		#include <linux/platform_device.h>
	#include <linux/pm_runtime.h>		#include <linux/pm_runtime.h>
	#include <linux/slab.h>		#include <linux/slab.h>
			#include <linux/spinlock.h>

	/* register offsets */		/* register offsets */
	#define ICSCR 0x00 /* slave ctrl */		#define ICSCR 0x00 /* slave ctrl */
	@@ -81,7 +84,6 @@

	#define RCAR_BUS_PHASE_START (MDBS \| MIE \| ESG)		#define RCAR_BUS_PHASE_START (MDBS \| MIE \| ESG)
	#define RCAR_BUS_PHASE_DATA (MDBS \| MIE)		#define RCAR_BUS_PHASE_DATA (MDBS \| MIE)
	#define RCAR_BUS_MASK_DATA (~(ESG \| FSB) & 0xFF)
	#define RCAR_BUS_PHASE_STOP (MDBS \| MIE \| FSB)		#define RCAR_BUS_PHASE_STOP (MDBS \| MIE \| FSB)

	#define RCAR_IRQ_SEND (MNR \| MAL \| MST \| MAT \| MDE)		#define RCAR_IRQ_SEND (MNR \| MAL \| MST \| MAT \| MDE)
	@@ -92,6 +94,7 @@
	#define RCAR_IRQ_ACK_RECV (~(MAT \| MDR) & 0xFF)		#define RCAR_IRQ_ACK_RECV (~(MAT \| MDR) & 0xFF)

	#define ID_LAST_MSG (1 << 0)		#define ID_LAST_MSG (1 << 0)
			#define ID_IOERROR (1 << 1)
	#define ID_DONE (1 << 2)		#define ID_DONE (1 << 2)
	#define ID_ARBLOST (1 << 3)		#define ID_ARBLOST (1 << 3)
	#define ID_NACK (1 << 4)		#define ID_NACK (1 << 4)
	@@ -106,9 +109,9 @@ struct rcar_i2c_priv {
	void __iomem *io;		void __iomem *io;
	struct i2c_adapter adap;		struct i2c_adapter adap;
	struct i2c_msg *msg;		struct i2c_msg *msg;
	int msgs_left;
	struct clk *clk;		struct clk *clk;

			spinlock_t lock;
	wait_queue_head_t wait;		wait_queue_head_t wait;

	int pos;		int pos;
	@@ -141,10 +144,9 @@ static void rcar_i2c_init(struct rcar_i2c_priv *priv)
	{		{
	/* reset master mode */		/* reset master mode */
	rcar_i2c_write(priv, ICMIER, 0);		rcar_i2c_write(priv, ICMIER, 0);
	rcar_i2c_write(priv, ICMCR, MDBS);		rcar_i2c_write(priv, ICMCR, 0);
	rcar_i2c_write(priv, ICMSR, 0);		rcar_i2c_write(priv, ICMSR, 0);
	/* start clock */		rcar_i2c_write(priv, ICMAR, 0);
	rcar_i2c_write(priv, ICCCR, priv->icccr);
	}		}

	static int rcar_i2c_bus_barrier(struct rcar_i2c_priv *priv)		static int rcar_i2c_bus_barrier(struct rcar_i2c_priv *priv)
	@@ -243,7 +245,9 @@ static int rcar_i2c_clock_calculate(struct rcar_i2c_priv *priv,
	dev_dbg(dev, "clk %d/%d(%lu), round %u, CDF:0x%x, SCGD: 0x%x\n",		dev_dbg(dev, "clk %d/%d(%lu), round %u, CDF:0x%x, SCGD: 0x%x\n",
	scl, bus_speed, clk_get_rate(priv->clk), round, cdf, scgd);		scl, bus_speed, clk_get_rate(priv->clk), round, cdf, scgd);

	/* keep icccr value */		/*
			* keep icccr value
			*/
	priv->icccr = scgd << cdf_width \| cdf;		priv->icccr = scgd << cdf_width \| cdf;

	return 0;		return 0;
	@@ -253,24 +257,12 @@ static void rcar_i2c_prepare_msg(struct rcar_i2c_priv *priv)
	{		{
	int read = !!rcar_i2c_is_recv(priv);		int read = !!rcar_i2c_is_recv(priv);

	priv->pos = 0;
	priv->flags = 0;
	if (priv->msgs_left == 1)
	rcar_i2c_flags_set(priv, ID_LAST_MSG);

	rcar_i2c_write(priv, ICMAR, (priv->msg->addr << 1) \| read);		rcar_i2c_write(priv, ICMAR, (priv->msg->addr << 1) \| read);
	rcar_i2c_write(priv, ICMSR, 0);		rcar_i2c_write(priv, ICMSR, 0);
	rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);		rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_START);
	rcar_i2c_write(priv, ICMIER, read ? RCAR_IRQ_RECV : RCAR_IRQ_SEND);		rcar_i2c_write(priv, ICMIER, read ? RCAR_IRQ_RECV : RCAR_IRQ_SEND);
	}		}

	static void rcar_i2c_next_msg(struct rcar_i2c_priv *priv)
	{
	priv->msg++;
	priv->msgs_left--;
	rcar_i2c_prepare_msg(priv);
	}

	/*		/*
	* interrupt functions		* interrupt functions
	*/		*/
	@@ -278,10 +270,21 @@ static int rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)
	{		{
	struct i2c_msg *msg = priv->msg;		struct i2c_msg *msg = priv->msg;

	/* FIXME: sometimes, unknown interrupt happened. Do nothing */		/*
			* FIXME
			* sometimes, unknown interrupt happened.
			* Do nothing
			*/
	if (!(msr & MDE))		if (!(msr & MDE))
	return 0;		return 0;

			/*
			* If address transfer phase finished,
			* goto data phase.
			*/
			if (msr & MAT)
			rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);

	if (priv->pos < msg->len) {		if (priv->pos < msg->len) {
	/*		/*
	* Prepare next data to ICRXTX register.		* Prepare next data to ICRXTX register.
	@@ -302,17 +305,21 @@ static int rcar_i2c_irq_send(struct rcar_i2c_priv *priv, u32 msr)
	* [ICRXTX] -> [SHIFT] -> [I2C bus]		* [ICRXTX] -> [SHIFT] -> [I2C bus]
	*/		*/

	if (priv->flags & ID_LAST_MSG) {		if (priv->flags & ID_LAST_MSG)
	/*		/*
	* If current msg is the _LAST_ msg,		* If current msg is the _LAST_ msg,
	* prepare stop condition here.		* prepare stop condition here.
	* ID_DONE will be set on STOP irq.		* ID_DONE will be set on STOP irq.
	*/		*/
	rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);		rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
	} else {		else
	rcar_i2c_next_msg(priv);		/*
	return 0;		* If current msg is _NOT_ last msg,
	}		* it doesn't call stop phase.
			* thus, there is no STOP irq.
			* return ID_DONE here.
			*/
			return ID_DONE;
	}		}

	rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_SEND);		rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_SEND);
	@@ -324,29 +331,38 @@ static int rcar_i2c_irq_recv(struct rcar_i2c_priv *priv, u32 msr)
	{		{
	struct i2c_msg *msg = priv->msg;		struct i2c_msg *msg = priv->msg;

	/* FIXME: sometimes, unknown interrupt happened. Do nothing */		/*
			* FIXME
			* sometimes, unknown interrupt happened.
			* Do nothing
			*/
	if (!(msr & MDR))		if (!(msr & MDR))
	return 0;		return 0;

	if (msr & MAT) {		if (msr & MAT) {
	/* Address transfer phase finished, but no data at this point. */		/*
			* Address transfer phase finished,
			* but, there is no data at this point.
			* Do nothing.
			*/
	} else if (priv->pos < msg->len) {		} else if (priv->pos < msg->len) {
	/* get received data */		/*
			* get received data
			*/
	msg->buf[priv->pos] = rcar_i2c_read(priv, ICRXTX);		msg->buf[priv->pos] = rcar_i2c_read(priv, ICRXTX);
	priv->pos++;		priv->pos++;
	}		}

	/*		/*
	* If next received data is the _LAST_, go to STOP phase. Might be		* If next received data is the _LAST_,
	* overwritten by REP START when setting up a new msg. Not elegant		* go to STOP phase,
	* but the only stable sequence for REP START I have found so far.		* otherwise, go to DATA phase.
	*/		*/
	if (priv->pos + 1 >= msg->len)		if (priv->pos + 1 >= msg->len)
	rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);		rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);

	if (priv->pos == msg->len && !(priv->flags & ID_LAST_MSG))
	rcar_i2c_next_msg(priv);
	else		else
			rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_DATA);

	rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_RECV);		rcar_i2c_write(priv, ICMSR, RCAR_IRQ_ACK_RECV);

	return 0;		return 0;
	@@ -410,21 +426,22 @@ static bool rcar_i2c_slave_irq(struct rcar_i2c_priv *priv)
	static irqreturn_t rcar_i2c_irq(int irq, void *ptr)		static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
	{		{
	struct rcar_i2c_priv *priv = ptr;		struct rcar_i2c_priv *priv = ptr;
	u32 msr, val;		irqreturn_t result = IRQ_HANDLED;
			u32 msr;

	/* Clear START or STOP as soon as we can */		/-------------- spin lock -----------------/
	val = rcar_i2c_read(priv, ICMCR);		spin_lock(&priv->lock);
	rcar_i2c_write(priv, ICMCR, val & RCAR_BUS_MASK_DATA);
			if (rcar_i2c_slave_irq(priv))
			goto exit;

	msr = rcar_i2c_read(priv, ICMSR);		msr = rcar_i2c_read(priv, ICMSR);

	/* Only handle interrupts that are currently enabled */		/* Only handle interrupts that are currently enabled */
	msr &= rcar_i2c_read(priv, ICMIER);		msr &= rcar_i2c_read(priv, ICMIER);
	if (!msr) {		if (!msr) {
	if (rcar_i2c_slave_irq(priv))		result = IRQ_NONE;
	return IRQ_HANDLED;		goto exit;

	return IRQ_NONE;
	}		}

	/* Arbitration lost */		/* Arbitration lost */
	@@ -435,7 +452,8 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)

	/* Nack */		/* Nack */
	if (msr & MNR) {		if (msr & MNR) {
	/* HW automatically sends STOP after received NACK */		/* go to stop phase */
			rcar_i2c_write(priv, ICMCR, RCAR_BUS_PHASE_STOP);
	rcar_i2c_write(priv, ICMIER, RCAR_IRQ_STOP);		rcar_i2c_write(priv, ICMIER, RCAR_IRQ_STOP);
	rcar_i2c_flags_set(priv, ID_NACK);		rcar_i2c_flags_set(priv, ID_NACK);
	goto out;		goto out;
	@@ -443,7 +461,6 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)

	/* Stop */		/* Stop */
	if (msr & MST) {		if (msr & MST) {
	priv->msgs_left--; /* The last message also made it */
	rcar_i2c_flags_set(priv, ID_DONE);		rcar_i2c_flags_set(priv, ID_DONE);
	goto out;		goto out;
	}		}
	@@ -460,7 +477,11 @@ static irqreturn_t rcar_i2c_irq(int irq, void *ptr)
	wake_up(&priv->wait);		wake_up(&priv->wait);
	}		}

	return IRQ_HANDLED;		exit:
			spin_unlock(&priv->lock);
			/-------------- spin unlock -----------------/

			return result;
	}		}

	static int rcar_i2c_master_xfer(struct i2c_adapter *adap,		static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
	@@ -469,11 +490,22 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
	{		{
	struct rcar_i2c_priv *priv = i2c_get_adapdata(adap);		struct rcar_i2c_priv *priv = i2c_get_adapdata(adap);
	struct device *dev = rcar_i2c_priv_to_dev(priv);		struct device *dev = rcar_i2c_priv_to_dev(priv);
			unsigned long flags;
	int i, ret;		int i, ret;
	long time_left;		long timeout;

	pm_runtime_get_sync(dev);		pm_runtime_get_sync(dev);

			/-------------- spin lock -----------------/
			spin_lock_irqsave(&priv->lock, flags);

			rcar_i2c_init(priv);
			/* start clock */
			rcar_i2c_write(priv, ICCCR, priv->icccr);

			spin_unlock_irqrestore(&priv->lock, flags);
			/-------------- spin unlock -----------------/

	ret = rcar_i2c_bus_barrier(priv);		ret = rcar_i2c_bus_barrier(priv);
	if (ret < 0)		if (ret < 0)
	goto out;		goto out;
	@@ -482,28 +514,48 @@ static int rcar_i2c_master_xfer(struct i2c_adapter *adap,
	/* This HW can't send STOP after address phase */		/* This HW can't send STOP after address phase */
	if (msgs[i].len == 0) {		if (msgs[i].len == 0) {
	ret = -EOPNOTSUPP;		ret = -EOPNOTSUPP;
	goto out;		break;
	}
	}		}

	/* init data */		/-------------- spin lock -----------------/
	priv->msg = msgs;		spin_lock_irqsave(&priv->lock, flags);
	priv->msgs_left = num;
			/* init each data */
			priv->msg = &msgs[i];
			priv->pos = 0;
			priv->flags = 0;
			if (i == num - 1)
			rcar_i2c_flags_set(priv, ID_LAST_MSG);

	rcar_i2c_prepare_msg(priv);		rcar_i2c_prepare_msg(priv);

	time_left = wait_event_timeout(priv->wait,		spin_unlock_irqrestore(&priv->lock, flags);
			/-------------- spin unlock -----------------/

			timeout = wait_event_timeout(priv->wait,
	rcar_i2c_flags_has(priv, ID_DONE),		rcar_i2c_flags_has(priv, ID_DONE),
	num * adap->timeout);		adap->timeout);
	if (!time_left) {		if (!timeout) {
	rcar_i2c_init(priv);
	ret = -ETIMEDOUT;		ret = -ETIMEDOUT;
	} else if (rcar_i2c_flags_has(priv, ID_NACK)) {		break;
			}

			if (rcar_i2c_flags_has(priv, ID_NACK)) {
	ret = -ENXIO;		ret = -ENXIO;
	} else if (rcar_i2c_flags_has(priv, ID_ARBLOST)) {		break;
			}

			if (rcar_i2c_flags_has(priv, ID_ARBLOST)) {
	ret = -EAGAIN;		ret = -EAGAIN;
	} else {		break;
	ret = num - priv->msgs_left; /* The number of transfer */		}

			if (rcar_i2c_flags_has(priv, ID_IOERROR)) {
			ret = -EIO;
			break;
			}

			ret = i + 1; /* The number of transfer */
	}		}
	out:		out:
	pm_runtime_put(dev);		pm_runtime_put(dev);
	@@ -612,10 +664,9 @@ static int rcar_i2c_probe(struct platform_device *pdev)
	if (IS_ERR(priv->io))		if (IS_ERR(priv->io))
	return PTR_ERR(priv->io);		return PTR_ERR(priv->io);

	rcar_i2c_init(priv);

	irq = platform_get_irq(pdev, 0);		irq = platform_get_irq(pdev, 0);
	init_waitqueue_head(&priv->wait);		init_waitqueue_head(&priv->wait);
			spin_lock_init(&priv->lock);

	adap = &priv->adap;		adap = &priv->adap;
	adap->nr = pdev->id;		adap->nr = pdev->id;