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Commit 75e3808b authored by Oliver Pinter's avatar Oliver Pinter Committed by Thomas Gleixner
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x86: add cpu codenames for Kconfig.cpu



add cpu core name for arch/i386/Kconfig.cpu:Pentium 4 sections help
add Pentium D for arch/i386/Kconfig.cpu
add Pentium D for arch/x86_64/Kconfig

AK: Clarified some of the descriptions
[ tglx: arch/x86 adaptation ]

Signed-off-by: default avatarOliver Pinter <oliver.pntr@gmail.com>
Signed-off-by: default avatarAndi Kleen <ak@suse.de>
Acked-by: default avatarSam Ravnborg <sam@ravnborg.org>
Cc: Andi Kleen <ak@suse.de>
Signed-off-by: default avatarAndrew Morton <akpm@linux-foundation.org>
Signed-off-by: default avatarIngo Molnar <mingo@elte.hu>
Signed-off-by: default avatarThomas Gleixner <tglx@linutronix.de>
parent fb893e99
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+31 −5
Original line number Diff line number Diff line
@@ -109,16 +109,42 @@ config MCORE2
	help
	  Select this for Intel Core 2 and newer Core 2 Xeons (Xeon 51xx and 53xx)
	  CPUs. You can distinguish newer from older Xeons by the CPU family
	  in /proc/cpuinfo. Newer ones have 6.
	  in /proc/cpuinfo. Newer ones have 6 and older ones 15 (not a typo)

config MPENTIUM4
	bool "Pentium-4/Celeron(P4-based)/Pentium-4 M/older Xeon"
	help
	  Select this for Intel Pentium 4 chips.  This includes the
	  Pentium 4, P4-based Celeron and Xeon, and Pentium-4 M
	  (not Pentium M) chips.  This option enables compile flags
	  optimized for the chip, uses the correct cache shift, and
	  applies any applicable Pentium III optimizations.
	  Pentium 4, Pentium D, P4-based Celeron and Xeon, and
	  Pentium-4 M (not Pentium M) chips.  This option enables compile
	  flags optimized for the chip, uses the correct cache line size, and
	  applies any applicable optimizations.

	  CPUIDs: F[0-6][1-A] (in /proc/cpuinfo show = cpu family : 15 )

	  Select this for:
	    Pentiums (Pentium 4, Pentium D, Celeron, Celeron D) corename:
		-Willamette
		-Northwood
		-Mobile Pentium 4
		-Mobile Pentium 4 M
		-Extreme Edition (Gallatin)
		-Prescott
		-Prescott 2M
		-Cedar Mill
		-Presler
		-Smithfiled
	    Xeons (Intel Xeon, Xeon MP, Xeon LV, Xeon MV) corename:
		-Foster
		-Prestonia
		-Gallatin
		-Nocona
		-Irwindale
		-Cranford
		-Potomac
		-Paxville
		-Dempsey


config MK6
	bool "K6/K6-II/K6-III"
+4 −7
Original line number Diff line number Diff line
@@ -175,14 +175,12 @@ config MK8
config MPSC
       bool "Intel P4 / older Netburst based Xeon"
       help
	  Optimize for Intel Pentium 4 and older Nocona/Dempsey Xeon CPUs
	  with Intel Extended Memory 64 Technology(EM64T). For details see
	  <http://www.intel.com/technology/64bitextensions/>.
	  Optimize for Intel Pentium 4, Pentium D and older Nocona/Dempsey
	  Xeon CPUs with Intel 64bit which is compatible with x86-64.
	  Note that the latest Xeons (Xeon 51xx and 53xx) are not based on the
          Netburst core and shouldn't use this option. You can distinguish them
	  using the cpu family field
	  in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one
	  (this rule only applies to systems that support EM64T)
	  in /proc/cpuinfo. Family 15 is an older Xeon, Family 6 a newer one.

config MCORE2
	bool "Intel Core2 / newer Xeon"
@@ -190,8 +188,7 @@ config MCORE2
	  Optimize for Intel Core2 and newer Xeons (51xx)
	  You can distinguish the newer Xeons from the older ones using
	  the cpu family field in /proc/cpuinfo. 15 is an older Xeon
	  (use CONFIG_MPSC then), 6 is a newer one. This rule only
	  applies to CPUs that support EM64T.
	  (use CONFIG_MPSC then), 6 is a newer one.

config GENERIC_CPU
	bool "Generic-x86-64"