Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 757f4e51 authored by Maarten ter Huurne's avatar Maarten ter Huurne Committed by Vinod Koul
Browse files

MIPS: jz4740: Correct clock gate bit for DMA controller

parent 25ce6c35
Loading
Loading
Loading
Loading
+1 −1
Original line number Diff line number Diff line
@@ -687,7 +687,7 @@ static struct clk jz4740_clock_simple_clks[] = {
	[3] = {
		.name = "dma",
		.parent = &jz_clk_high_speed_peripheral.clk,
		.gate_bit = JZ_CLOCK_GATE_UART0,
		.gate_bit = JZ_CLOCK_GATE_DMAC,
		.ops = &jz_clk_simple_ops,
	},
	[4] = {