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Commit 7575983c authored by Bartlomiej Zolnierkiewicz's avatar Bartlomiej Zolnierkiewicz Committed by Eduardo Valentin
Browse files

thermal: exynos: remove test_mux pdata field



Replace pdata->test_mux check in get_con_reg() by explicitly
checking for SoC type.

Also since the used pdata->test_mux value is always identical
use it directly and remove pdata->test_mux completely.

There should be no functional changes caused by this patch.

Cc: Amit Daniel Kachhap <amit.daniel@samsung.com>
Cc: Lukasz Majewski <l.majewski@samsung.com>
Cc: Eduardo Valentin <edubezval@gmail.com>
Cc: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: default avatarBartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Acked-by: default avatarKyungmin Park <kyungmin.park@samsung.com>
Tested-by: default avatarLukasz Majewski <l.majewski@samsung.com>
Signed-off-by: default avatarEduardo Valentin <edubezval@gmail.com>
parent 17be30cb
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+3 −2
Original line number Diff line number Diff line
@@ -193,8 +193,9 @@ static u32 get_con_reg(struct exynos_tmu_data *data, u32 con)
{
	struct exynos_tmu_platform_data *pdata = data->pdata;

	if (pdata->test_mux)
		con |= (pdata->test_mux << EXYNOS4412_MUX_ADDR_SHIFT);
	if (data->soc == SOC_ARCH_EXYNOS4412 ||
	    data->soc == SOC_ARCH_EXYNOS3250)
		con |= (EXYNOS4412_MUX_ADDR_VALUE << EXYNOS4412_MUX_ADDR_SHIFT);

	con &= ~(EXYNOS_TMU_REF_VOLTAGE_MASK << EXYNOS_TMU_REF_VOLTAGE_SHIFT);
	con |= pdata->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT;
+0 −2
Original line number Diff line number Diff line
@@ -89,7 +89,6 @@ enum soc_type {
 * @first_point_trim: temp value of the first point trimming
 * @second_point_trim: temp value of the second point trimming
 * @default_temp_offset: default temperature offset in case of no trimming
 * @test_mux; information if SoC supports test MUX
 * @cal_type: calibration type for temperature
 * @freq_clip_table: Table representing frequency reduction percentage.
 * @freq_tab_count: Count of the above table as frequency reduction may
@@ -115,7 +114,6 @@ struct exynos_tmu_platform_data {
	u8 first_point_trim;
	u8 second_point_trim;
	u8 default_temp_offset;
	u8 test_mux;

	enum calibration_type cal_type;
	enum soc_type type;
+0 −2
Original line number Diff line number Diff line
@@ -109,7 +109,6 @@ struct exynos_tmu_init_data const exynos3250_default_tmu_data = {
		{
			EXYNOS3250_TMU_DATA,
			.type = SOC_ARCH_EXYNOS3250,
			.test_mux = EXYNOS4412_MUX_ADDR_VALUE,
		},
	},
	.tmu_count = 1,
@@ -160,7 +159,6 @@ struct exynos_tmu_init_data const exynos4412_default_tmu_data = {
		{
			EXYNOS4412_TMU_DATA,
			.type = SOC_ARCH_EXYNOS4412,
			.test_mux = EXYNOS4412_MUX_ADDR_VALUE,
		},
	},
	.tmu_count = 1,