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Commit 7414d2f6 authored by James Hogan's avatar James Hogan Committed by Paolo Bonzini
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MIPS: KVM: Use host CCA for TLB mappings 



KVM TLB mappings for the guest were being created with a cache coherency
attribute (CCA) of 3, which is cached incoherent. Create them instead
with the default host CCA, which should be the correct one for coherency
on SMP systems.

Signed-off-by: default avatarJames Hogan <james.hogan@imgtec.com>
Cc: Paolo Bonzini <pbonzini@redhat.com>
Cc: Radim Krčmář <rkrcmar@redhat.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: linux-mips@linux-mips.org
Cc: kvm@vger.kernel.org
Signed-off-by: default avatarPaolo Bonzini <pbonzini@redhat.com>
parent 42aa12e7

arch/mips/kvm/mmu.c

+10 −8
Original line number Diff line number Diff line
@@ -116,9 +116,11 @@ int kvm_mips_handle_kseg0_tlb_fault(unsigned long badvaddr, 
	pfn1 = kvm->arch.guest_pmap[gfn | 0x1];



	entrylo0 = mips3_paddr_to_tlbpfn(pfn0 << PAGE_SHIFT) |

		   (0x3 << ENTRYLO_C_SHIFT) | ENTRYLO_D | ENTRYLO_V;

		((_page_cachable_default >> _CACHE_SHIFT) << ENTRYLO_C_SHIFT) |

		ENTRYLO_D | ENTRYLO_V;

	entrylo1 = mips3_paddr_to_tlbpfn(pfn1 << PAGE_SHIFT) |

		   (0x3 << ENTRYLO_C_SHIFT) | ENTRYLO_D | ENTRYLO_V;

		((_page_cachable_default >> _CACHE_SHIFT) << ENTRYLO_C_SHIFT) |

		ENTRYLO_D | ENTRYLO_V;



	preempt_disable();

	entryhi = (vaddr | kvm_mips_get_kernel_asid(vcpu));
@@ -157,11 +159,11 @@ int kvm_mips_handle_mapped_seg_tlb_fault(struct kvm_vcpu *vcpu, 


	/* Get attributes from the Guest TLB */

	entrylo0 = mips3_paddr_to_tlbpfn(pfn0 << PAGE_SHIFT) |

		   (0x3 << ENTRYLO_C_SHIFT) |

		((_page_cachable_default >> _CACHE_SHIFT) << ENTRYLO_C_SHIFT) |

		(tlb->tlb_lo[0] & ENTRYLO_D) |

		(tlb->tlb_lo[0] & ENTRYLO_V);

	entrylo1 = mips3_paddr_to_tlbpfn(pfn1 << PAGE_SHIFT) |

		   (0x3 << ENTRYLO_C_SHIFT) |

		((_page_cachable_default >> _CACHE_SHIFT) << ENTRYLO_C_SHIFT) |

		(tlb->tlb_lo[1] & ENTRYLO_D) |

		(tlb->tlb_lo[1] & ENTRYLO_V);

arch/mips/kvm/tlb.c

+2 −1
Original line number Diff line number Diff line
@@ -179,7 +179,8 @@ int kvm_mips_handle_commpage_tlb_fault(unsigned long badvaddr, 
	pfn = CPHYSADDR(vcpu->arch.kseg0_commpage) >> PAGE_SHIFT;

	pair_idx = (badvaddr >> PAGE_SHIFT) & 1;

	entrylo[pair_idx] = mips3_paddr_to_tlbpfn(pfn << PAGE_SHIFT) |

		(0x3 << ENTRYLO_C_SHIFT) | ENTRYLO_D | ENTRYLO_V;

		((_page_cachable_default >> _CACHE_SHIFT) << ENTRYLO_C_SHIFT) |

		ENTRYLO_D | ENTRYLO_V;



	local_irq_save(flags);