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Commit 72729910 authored by Andrew Victor's avatar Andrew Victor Committed by Russell King
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[ARM] 3865/1: AT91RM9200 header updates



This is more preparation for adding support for the new Atmel AT91SAM9
processors.

Changes include:
- Replace AT91_BASE_* with AT91RM9200_BASE_*
- Replace AT91_ID_* with AT91RM9200_ID_*
- ROM, SRAM and UHP address definitions moved to at91rm9200.h.
- The raw AT91_P[ABCD]_* definitions are now depreciated in favour of
the GPIO API.

Signed-off-by: default avatarAndrew Victor <andrew@sanpeople.com>
Signed-off-by: default avatarRussell King <rmk+kernel@arm.linux.org.uk>
parent 26f90818
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+16 −16
Original line number Diff line number Diff line
@@ -26,78 +26,78 @@ static struct map_desc at91rm9200_io_desc[] __initdata = {
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_VA_BASE_SPI,
		.pfn		= __phys_to_pfn(AT91_BASE_SPI),
		.pfn		= __phys_to_pfn(AT91RM9200_BASE_SPI),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_VA_BASE_SSC2,
		.pfn		= __phys_to_pfn(AT91_BASE_SSC2),
		.pfn		= __phys_to_pfn(AT91RM9200_BASE_SSC2),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_VA_BASE_SSC1,
		.pfn		= __phys_to_pfn(AT91_BASE_SSC1),
		.pfn		= __phys_to_pfn(AT91RM9200_BASE_SSC1),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_VA_BASE_SSC0,
		.pfn		= __phys_to_pfn(AT91_BASE_SSC0),
		.pfn		= __phys_to_pfn(AT91RM9200_BASE_SSC0),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_VA_BASE_US3,
		.pfn		= __phys_to_pfn(AT91_BASE_US3),
		.pfn		= __phys_to_pfn(AT91RM9200_BASE_US3),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_VA_BASE_US2,
		.pfn		= __phys_to_pfn(AT91_BASE_US2),
		.pfn		= __phys_to_pfn(AT91RM9200_BASE_US2),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_VA_BASE_US1,
		.pfn		= __phys_to_pfn(AT91_BASE_US1),
		.pfn		= __phys_to_pfn(AT91RM9200_BASE_US1),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_VA_BASE_US0,
		.pfn		= __phys_to_pfn(AT91_BASE_US0),
		.pfn		= __phys_to_pfn(AT91RM9200_BASE_US0),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_VA_BASE_EMAC,
		.pfn		= __phys_to_pfn(AT91_BASE_EMAC),
		.pfn		= __phys_to_pfn(AT91RM9200_BASE_EMAC),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_VA_BASE_TWI,
		.pfn		= __phys_to_pfn(AT91_BASE_TWI),
		.pfn		= __phys_to_pfn(AT91RM9200_BASE_TWI),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_VA_BASE_MCI,
		.pfn		= __phys_to_pfn(AT91_BASE_MCI),
		.pfn		= __phys_to_pfn(AT91RM9200_BASE_MCI),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_VA_BASE_UDP,
		.pfn		= __phys_to_pfn(AT91_BASE_UDP),
		.pfn		= __phys_to_pfn(AT91RM9200_BASE_UDP),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_VA_BASE_TCB1,
		.pfn		= __phys_to_pfn(AT91_BASE_TCB1),
		.pfn		= __phys_to_pfn(AT91RM9200_BASE_TCB1),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_VA_BASE_TCB0,
		.pfn		= __phys_to_pfn(AT91_BASE_TCB0),
		.pfn		= __phys_to_pfn(AT91RM9200_BASE_TCB0),
		.length		= SZ_16K,
		.type		= MT_DEVICE,
	}, {
		.virtual	= AT91_SRAM_VIRT_BASE,
		.pfn		= __phys_to_pfn(AT91_SRAM_BASE),
		.length		= AT91_SRAM_SIZE,
		.pfn		= __phys_to_pfn(AT91RM9200_SRAM_BASE),
		.length		= AT91RM9200_SRAM_SIZE,
		.type		= MT_DEVICE,
	},
};
+14 −14
Original line number Diff line number Diff line
@@ -190,85 +190,85 @@ static void pmc_periph_mode(struct clk *clk, int is_on)
static struct clk udc_clk = {
	.name		= "udc_clk",
	.parent		= &mck,
	.pmc_mask	= 1 << AT91_ID_UDP,
	.pmc_mask	= 1 << AT91RM9200_ID_UDP,
	.mode		= pmc_periph_mode,
};
static struct clk ohci_clk = {
	.name		= "ohci_clk",
	.parent		= &mck,
	.pmc_mask	= 1 << AT91_ID_UHP,
	.pmc_mask	= 1 << AT91RM9200_ID_UHP,
	.mode		= pmc_periph_mode,
};
static struct clk ether_clk = {
	.name		= "ether_clk",
	.parent		= &mck,
	.pmc_mask	= 1 << AT91_ID_EMAC,
	.pmc_mask	= 1 << AT91RM9200_ID_EMAC,
	.mode		= pmc_periph_mode,
};
static struct clk mmc_clk = {
	.name		= "mci_clk",
	.parent		= &mck,
	.pmc_mask	= 1 << AT91_ID_MCI,
	.pmc_mask	= 1 << AT91RM9200_ID_MCI,
	.mode		= pmc_periph_mode,
};
static struct clk twi_clk = {
	.name		= "twi_clk",
	.parent		= &mck,
	.pmc_mask	= 1 << AT91_ID_TWI,
	.pmc_mask	= 1 << AT91RM9200_ID_TWI,
	.mode		= pmc_periph_mode,
};
static struct clk usart0_clk = {
	.name		= "usart0_clk",
	.parent		= &mck,
	.pmc_mask	= 1 << AT91_ID_US0,
	.pmc_mask	= 1 << AT91RM9200_ID_US0,
	.mode		= pmc_periph_mode,
};
static struct clk usart1_clk = {
	.name		= "usart1_clk",
	.parent		= &mck,
	.pmc_mask	= 1 << AT91_ID_US1,
	.pmc_mask	= 1 << AT91RM9200_ID_US1,
	.mode		= pmc_periph_mode,
};
static struct clk usart2_clk = {
	.name		= "usart2_clk",
	.parent		= &mck,
	.pmc_mask	= 1 << AT91_ID_US2,
	.pmc_mask	= 1 << AT91RM9200_ID_US2,
	.mode		= pmc_periph_mode,
};
static struct clk usart3_clk = {
	.name		= "usart3_clk",
	.parent		= &mck,
	.pmc_mask	= 1 << AT91_ID_US3,
	.pmc_mask	= 1 << AT91RM9200_ID_US3,
	.mode		= pmc_periph_mode,
};
static struct clk spi_clk = {
	.name		= "spi0_clk",
	.parent		= &mck,
	.pmc_mask	= 1 << AT91_ID_SPI,
	.pmc_mask	= 1 << AT91RM9200_ID_SPI,
	.mode		= pmc_periph_mode,
};
static struct clk pioA_clk = {
	.name		= "pioA_clk",
	.parent		= &mck,
	.pmc_mask	= 1 << AT91_ID_PIOA,
	.pmc_mask	= 1 << AT91RM9200_ID_PIOA,
	.mode		= pmc_periph_mode,
};
static struct clk pioB_clk = {
	.name		= "pioB_clk",
	.parent		= &mck,
	.pmc_mask	= 1 << AT91_ID_PIOB,
	.pmc_mask	= 1 << AT91RM9200_ID_PIOB,
	.mode		= pmc_periph_mode,
};
static struct clk pioC_clk = {
	.name		= "pioC_clk",
	.parent		= &mck,
	.pmc_mask	= 1 << AT91_ID_PIOC,
	.pmc_mask	= 1 << AT91RM9200_ID_PIOC,
	.mode		= pmc_periph_mode,
};
static struct clk pioD_clk = {
	.name		= "pioD_clk",
	.parent		= &mck,
	.pmc_mask	= 1 << AT91_ID_PIOD,
	.pmc_mask	= 1 << AT91RM9200_ID_PIOD,
	.mode		= pmc_periph_mode,
};

+36 −36
Original line number Diff line number Diff line
@@ -35,13 +35,13 @@ static struct at91_usbh_data usbh_data;

static struct resource at91_usbh_resources[] = {
	[0] = {
		.start	= AT91_UHP_BASE,
		.end	= AT91_UHP_BASE + SZ_1M - 1,
		.start	= AT91RM9200_UHP_BASE,
		.end	= AT91RM9200_UHP_BASE + SZ_1M - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= AT91_ID_UHP,
		.end	= AT91_ID_UHP,
		.start	= AT91RM9200_ID_UHP,
		.end	= AT91RM9200_ID_UHP,
		.flags	= IORESOURCE_IRQ,
	},
};
@@ -80,13 +80,13 @@ static struct at91_udc_data udc_data;

static struct resource at91_udc_resources[] = {
	[0] = {
		.start	= AT91_BASE_UDP,
		.end	= AT91_BASE_UDP + SZ_16K - 1,
		.start	= AT91RM9200_BASE_UDP,
		.end	= AT91RM9200_BASE_UDP + SZ_16K - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= AT91_ID_UDP,
		.end	= AT91_ID_UDP,
		.start	= AT91RM9200_ID_UDP,
		.end	= AT91RM9200_ID_UDP,
		.flags	= IORESOURCE_IRQ,
	},
};
@@ -131,13 +131,13 @@ static struct at91_eth_data eth_data;

static struct resource at91_eth_resources[] = {
	[0] = {
		.start	= AT91_BASE_EMAC,
		.end	= AT91_BASE_EMAC + SZ_16K - 1,
		.start	= AT91RM9200_BASE_EMAC,
		.end	= AT91RM9200_BASE_EMAC + SZ_16K - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= AT91_ID_EMAC,
		.end	= AT91_ID_EMAC,
		.start	= AT91RM9200_ID_EMAC,
		.end	= AT91RM9200_ID_EMAC,
		.flags	= IORESOURCE_IRQ,
	},
};
@@ -263,13 +263,13 @@ static struct at91_mmc_data mmc_data;

static struct resource at91_mmc_resources[] = {
	[0] = {
		.start	= AT91_BASE_MCI,
		.end	= AT91_BASE_MCI + SZ_16K - 1,
		.start	= AT91RM9200_BASE_MCI,
		.end	= AT91RM9200_BASE_MCI + SZ_16K - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= AT91_ID_MCI,
		.end	= AT91_ID_MCI,
		.start	= AT91RM9200_ID_MCI,
		.end	= AT91RM9200_ID_MCI,
		.flags	= IORESOURCE_IRQ,
	},
};
@@ -423,13 +423,13 @@ static u64 spi_dmamask = 0xffffffffUL;

static struct resource at91_spi_resources[] = {
	[0] = {
		.start	= AT91_BASE_SPI,
		.end	= AT91_BASE_SPI + SZ_16K - 1,
		.start	= AT91RM9200_BASE_SPI,
		.end	= AT91RM9200_BASE_SPI + SZ_16K - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= AT91_ID_SPI,
		.end	= AT91_ID_SPI,
		.start	= AT91RM9200_ID_SPI,
		.end	= AT91RM9200_ID_SPI,
		.flags	= IORESOURCE_IRQ,
	},
};
@@ -582,13 +582,13 @@ static inline void configure_dbgu_pins(void)

static struct resource uart0_resources[] = {
	[0] = {
		.start	= AT91_BASE_US0,
		.end	= AT91_BASE_US0 + SZ_16K - 1,
		.start	= AT91RM9200_BASE_US0,
		.end	= AT91RM9200_BASE_US0 + SZ_16K - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= AT91_ID_US0,
		.end	= AT91_ID_US0,
		.start	= AT91RM9200_ID_US0,
		.end	= AT91RM9200_ID_US0,
		.flags	= IORESOURCE_IRQ,
	},
};
@@ -624,13 +624,13 @@ static inline void configure_usart0_pins(void)

static struct resource uart1_resources[] = {
	[0] = {
		.start	= AT91_BASE_US1,
		.end	= AT91_BASE_US1 + SZ_16K - 1,
		.start	= AT91RM9200_BASE_US1,
		.end	= AT91RM9200_BASE_US1 + SZ_16K - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= AT91_ID_US1,
		.end	= AT91_ID_US1,
		.start	= AT91RM9200_ID_US1,
		.end	= AT91RM9200_ID_US1,
		.flags	= IORESOURCE_IRQ,
	},
};
@@ -665,13 +665,13 @@ static inline void configure_usart1_pins(void)

static struct resource uart2_resources[] = {
	[0] = {
		.start	= AT91_BASE_US2,
		.end	= AT91_BASE_US2 + SZ_16K - 1,
		.start	= AT91RM9200_BASE_US2,
		.end	= AT91RM9200_BASE_US2 + SZ_16K - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= AT91_ID_US2,
		.end	= AT91_ID_US2,
		.start	= AT91RM9200_ID_US2,
		.end	= AT91RM9200_ID_US2,
		.flags	= IORESOURCE_IRQ,
	},
};
@@ -700,13 +700,13 @@ static inline void configure_usart2_pins(void)

static struct resource uart3_resources[] = {
	[0] = {
		.start	= AT91_BASE_US3,
		.end	= AT91_BASE_US3 + SZ_16K - 1,
		.start	= AT91RM9200_BASE_US3,
		.end	= AT91RM9200_BASE_US3 + SZ_16K - 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= AT91_ID_US3,
		.end	= AT91_ID_US3,
		.start	= AT91RM9200_ID_US3,
		.end	= AT91RM9200_ID_US3,
		.flags	= IORESOURCE_IRQ,
	},
};
+8 −8
Original line number Diff line number Diff line
@@ -261,10 +261,10 @@ void at91_gpio_suspend(void)
		at91_sys_write(pio_controller_offset[i] + PIO_IER, wakeups[i]);

		if (!wakeups[i]) {
			disable_irq_wake(AT91_ID_PIOA + i);
			at91_sys_write(AT91_PMC_PCDR, 1 << (AT91_ID_PIOA + i));
			disable_irq_wake(AT91RM9200_ID_PIOA + i);
			at91_sys_write(AT91_PMC_PCDR, 1 << (AT91RM9200_ID_PIOA + i));
		} else {
			enable_irq_wake(AT91_ID_PIOA + i);
			enable_irq_wake(AT91RM9200_ID_PIOA + i);
#ifdef CONFIG_PM_DEBUG
			printk(KERN_DEBUG "GPIO-%c may wake for %08x\n", "ABCD"[i], wakeups[i]);
#endif
@@ -282,10 +282,10 @@ void at91_gpio_resume(void)
	}

	at91_sys_write(AT91_PMC_PCER,
			  (1 << AT91_ID_PIOA)
			| (1 << AT91_ID_PIOB)
			| (1 << AT91_ID_PIOC)
			| (1 << AT91_ID_PIOD));
			  (1 << AT91RM9200_ID_PIOA)
			| (1 << AT91RM9200_ID_PIOB)
			| (1 << AT91RM9200_ID_PIOC)
			| (1 << AT91RM9200_ID_PIOD));
}

#else
@@ -384,7 +384,7 @@ void __init at91_gpio_irq_setup(unsigned banks)

	if (banks > 4)
		banks = 4;
	for (pioc = 0, pin = PIN_BASE, id = AT91_ID_PIOA;
	for (pioc = 0, pin = PIN_BASE, id = AT91RM9200_ID_PIOA;
			pioc < banks;
			pioc++, id++) {
		void __iomem	*controller;
+2 −2
Original line number Diff line number Diff line
@@ -61,12 +61,12 @@ static int at91_aic_set_type(unsigned irq, unsigned type)
		srctype = AT91_AIC_SRCTYPE_RISING;
		break;
	case IRQT_LOW:
		if ((irq > AT91_ID_FIQ) && (irq < AT91_ID_IRQ0))	/* only supported on external interrupts */
		if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0))	/* only supported on external interrupts */
			return -EINVAL;
		srctype = AT91_AIC_SRCTYPE_LOW;
		break;
	case IRQT_FALLING:
		if ((irq > AT91_ID_FIQ) && (irq < AT91_ID_IRQ0))	/* only supported on external interrupts */
		if ((irq > AT91_ID_FIQ) && (irq < AT91RM9200_ID_IRQ0))	/* only supported on external interrupts */
			return -EINVAL;
		srctype = AT91_AIC_SRCTYPE_FALLING;
		break;
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