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Commit 726d32bf authored by Nicolas Ferre's avatar Nicolas Ferre
Browse files

ARM: at91: SAMA5D4 SoC detection code and low level routines



SoC identification code, kernel uncompress and low level
debugging routines update.
On SAMA5D4, DBGU is at another address AT91_BASE_DBGU2 so another
round of detection is needed. We also had to differentiate with
SAMA5D3 SoC family and rename some variables.

Signed-off-by: default avatarNicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: default avatarAlexandre Belloni <alexandre.belloni@free-electrons.com>
parent 2dc850b6
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+15 −1
Original line number Diff line number Diff line
@@ -73,7 +73,7 @@ static void __init sama5_dt_device_init(void)
	of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
}

static const char *sama5_dt_board_compat[] __initdata = {
static const char *sama5_dt_board_compat[] __initconst = {
	"atmel,sama5",
	NULL
};
@@ -88,3 +88,17 @@ DT_MACHINE_START(sama5_dt, "Atmel SAMA5 (Device Tree)")
	.init_machine	= sama5_dt_device_init,
	.dt_compat	= sama5_dt_board_compat,
MACHINE_END

static const char *sama5_alt_dt_board_compat[] __initconst = {
	"atmel,sama5d4",
	NULL
};

DT_MACHINE_START(sama5_alt_dt, "Atmel SAMA5 (Device Tree)")
	/* Maintainer: Atmel */
	.map_io		= at91_alt_map_io,
	.init_early	= at91_dt_initialize,
	.init_machine	= sama5_dt_device_init,
	.dt_compat	= sama5_alt_dt_board_compat,
	.l2c_aux_mask	= ~0UL,
MACHINE_END
+1 −0
Original line number Diff line number Diff line
@@ -14,6 +14,7 @@

 /* Map io */
extern void __init at91_map_io(void);
extern void __init at91_alt_map_io(void);
extern void __init at91_init_sram(int bank, unsigned long base,
				  unsigned int length);

+12 −1
Original line number Diff line number Diff line
@@ -36,7 +36,7 @@
#define ARCH_ID_AT91M40807	0x14080745
#define ARCH_ID_AT91R40008	0x44000840

#define ARCH_ID_SAMA5D3		0x8A5C07C0
#define ARCH_ID_SAMA5		0x8A5C07C0

#define ARCH_EXID_AT91SAM9M11	0x00000001
#define ARCH_EXID_AT91SAM9M10	0x00000002
@@ -49,12 +49,19 @@
#define ARCH_EXID_AT91SAM9G25	0x00000003
#define ARCH_EXID_AT91SAM9X25	0x00000004

#define ARCH_EXID_SAMA5D3	0x00004300
#define ARCH_EXID_SAMA5D31	0x00444300
#define ARCH_EXID_SAMA5D33	0x00414300
#define ARCH_EXID_SAMA5D34	0x00414301
#define ARCH_EXID_SAMA5D35	0x00584300
#define ARCH_EXID_SAMA5D36	0x00004301

#define ARCH_EXID_SAMA5D4	0x00000007
#define ARCH_EXID_SAMA5D41	0x00000001
#define ARCH_EXID_SAMA5D42	0x00000002
#define ARCH_EXID_SAMA5D43	0x00000003
#define ARCH_EXID_SAMA5D44	0x00000004

#define ARCH_FAMILY_AT91X92	0x09200000
#define ARCH_FAMILY_AT91SAM9	0x01900000
#define ARCH_FAMILY_AT91SAM9XE	0x02900000
@@ -111,6 +118,10 @@ enum at91_soc_subtype {
	AT91_SOC_SAMA5D31, AT91_SOC_SAMA5D33, AT91_SOC_SAMA5D34,
	AT91_SOC_SAMA5D35, AT91_SOC_SAMA5D36,

	/* SAMA5D4 */
	AT91_SOC_SAMA5D41, AT91_SOC_SAMA5D42, AT91_SOC_SAMA5D43,
	AT91_SOC_SAMA5D44,

	/* No subtype for this SoC */
	AT91_SOC_SUBTYPE_NONE,

+4 −1
Original line number Diff line number Diff line
@@ -16,8 +16,11 @@

#if defined(CONFIG_AT91_DEBUG_LL_DBGU0)
#define AT91_DBGU AT91_BASE_DBGU0
#else
#elif defined(CONFIG_AT91_DEBUG_LL_DBGU1)
#define AT91_DBGU AT91_BASE_DBGU1
#else
/* On sama5d4, use USART3 as low level serial console */
#define AT91_DBGU SAMA5D4_BASE_USART3
#endif

	.macro	addruart, rp, rv, tmp
+18 −1
Original line number Diff line number Diff line
@@ -19,8 +19,10 @@
/* DBGU base */
/* rm9200, 9260/9g20, 9261/9g10, 9rl */
#define AT91_BASE_DBGU0	0xfffff200
/* 9263, 9g45 */
/* 9263, 9g45, sama5d3 */
#define AT91_BASE_DBGU1	0xffffee00
/* sama5d4 */
#define AT91_BASE_DBGU2	0xfc069000

#if defined(CONFIG_ARCH_AT91X40)
#include <mach/at91x40.h>
@@ -34,6 +36,7 @@
#include <mach/at91sam9x5.h>
#include <mach/at91sam9n12.h>
#include <mach/sama5d3.h>
#include <mach/sama5d4.h>

/*
 * On all at91 except rm9200 and x40 have the System Controller starts
@@ -47,6 +50,11 @@
 * and map the same memory space
 */
#define AT91_BASE_SYS	0xffffc000

/*
 * On sama5d4 there is no system controller, we map some needed peripherals
 */
#define AT91_ALT_BASE_SYS	0xfc069000
#endif

/*
@@ -69,6 +77,13 @@
 */
#define AT91_IO_PHYS_BASE	0xFFF78000
#define AT91_IO_VIRT_BASE	IOMEM(0xFF000000 - AT91_IO_SIZE)

/*
 * On sama5d4, remap the peripherals from address 0xFC069000 .. 0xFC06F000
 * to 0xFB069000 .. 0xFB06F000.  (24Kb)
 */
#define AT91_ALT_IO_PHYS_BASE	AT91_ALT_BASE_SYS
#define AT91_ALT_IO_VIRT_BASE	IOMEM(0xFB069000)
#else
/*
 * Identity mapping for the non MMU case.
@@ -81,11 +96,13 @@

 /* Convert a physical IO address to virtual IO address */
#define AT91_IO_P2V(x)		((x) - AT91_IO_PHYS_BASE + AT91_IO_VIRT_BASE)
#define AT91_ALT_IO_P2V(x)	((x) - AT91_ALT_IO_PHYS_BASE + AT91_ALT_IO_VIRT_BASE)

/*
 * Virtual to Physical Address mapping for IO devices.
 */
#define AT91_VA_BASE_SYS	AT91_IO_P2V(AT91_BASE_SYS)
#define AT91_ALT_VA_BASE_SYS	AT91_ALT_IO_P2V(AT91_ALT_BASE_SYS)

 /* Internal SRAM is mapped below the IO devices */
#define AT91_SRAM_MAX		SZ_1M
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