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Commit 7021d122 authored by Joseph Lo's avatar Joseph Lo Committed by Stephen Warren
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ARM: tegra: add clock source of PMC to device trees



Adding the bindings of the clock source of PMC in DT.

Signed-off-by: default avatarJoseph Lo <josephl@nvidia.com>
Signed-off-by: default avatarStephen Warren <swarren@nvidia.com>
parent 7495b2eb
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+28 −1
Original line number Original line Diff line number Diff line
NVIDIA Tegra Power Management Controller (PMC)
NVIDIA Tegra Power Management Controller (PMC)


Properties:
Required properties:
- name : Should be pmc
- name : Should be pmc
- compatible : Should contain "nvidia,tegra<chip>-pmc".
- compatible : Should contain "nvidia,tegra<chip>-pmc".
- reg : Offset and length of the register set for the device
- reg : Offset and length of the register set for the device
- clocks : Must contain an entry for each entry in clock-names.
- clock-names : Must include the following entries:
  "pclk" (The Tegra clock of that name),
  "clk32k_in" (The 32KHz clock input to Tegra).

Optional properties:
- nvidia,invert-interrupt : If present, inverts the PMU interrupt signal.
- nvidia,invert-interrupt : If present, inverts the PMU interrupt signal.
  The PMU is an external Power Management Unit, whose interrupt output
  The PMU is an external Power Management Unit, whose interrupt output
  signal is fed into the PMC. This signal is optionally inverted, and then
  signal is fed into the PMC. This signal is optionally inverted, and then
@@ -12,8 +18,29 @@ Properties:


Example:
Example:


/ SoC dts including file
pmc@7000f400 {
pmc@7000f400 {
	compatible = "nvidia,tegra20-pmc";
	compatible = "nvidia,tegra20-pmc";
	reg = <0x7000e400 0x400>;
	reg = <0x7000e400 0x400>;
	clocks = <&tegra_car 110>, <&clk32k_in>;
	clock-names = "pclk", "clk32k_in";
	nvidia,invert-interrupt;
	nvidia,invert-interrupt;
};
};

/ Tegra board dts file
{
	...
	clocks {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		clk32k_in: clock {
			compatible = "fixed-clock";
			reg=<0>;
			#clock-cells = <0>;
			clock-frequency = <32768>;
		};
	};
	...
};
+13 −0
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@@ -18,4 +18,17 @@
	pmc {
	pmc {
		nvidia,invert-interrupt;
		nvidia,invert-interrupt;
	};
	};

	clocks {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		clk32k_in: clock {
			compatible = "fixed-clock";
			reg=<0>;
			#clock-cells = <0>;
			clock-frequency = <32768>;
		};
	};
};
};
+13 −0
Original line number Original line Diff line number Diff line
@@ -18,4 +18,17 @@
	pmc {
	pmc {
		nvidia,invert-interrupt;
		nvidia,invert-interrupt;
	};
	};

	clocks {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		clk32k_in: clock {
			compatible = "fixed-clock";
			reg=<0>;
			#clock-cells = <0>;
			clock-frequency = <32768>;
		};
	};
};
};
+2 −0
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@@ -101,6 +101,8 @@
	pmc {
	pmc {
		compatible = "nvidia,tegra114-pmc";
		compatible = "nvidia,tegra114-pmc";
		reg = <0x7000e400 0x400>;
		reg = <0x7000e400 0x400>;
		clocks = <&tegra_car 261>, <&clk32k_in>;
		clock-names = "pclk", "clk32k_in";
	};
	};


	iommu {
	iommu {
+13 −0
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@@ -447,6 +447,19 @@
		cd-gpios = <&gpio 23 1>; /* gpio PC7 */
		cd-gpios = <&gpio 23 1>; /* gpio PC7 */
	};
	};


	clocks {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <0>;

		clk32k_in: clock {
			compatible = "fixed-clock";
			reg=<0>;
			#clock-cells = <0>;
			clock-frequency = <32768>;
		};
	};

	sound {
	sound {
		compatible = "nvidia,tegra-audio-wm9712-colibri_t20",
		compatible = "nvidia,tegra-audio-wm9712-colibri_t20",
			         "nvidia,tegra-audio-wm9712";
			         "nvidia,tegra-audio-wm9712";
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