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Commit 6f3d395a authored by Anton Vorontsov's avatar Anton Vorontsov Committed by Kumar Gala
Browse files

powerpc/86xx: Convert gef_pic_lock to raw_spinlock 



Interrupt controllers' hooks are executed in the atomic context, so
they are not permitted to sleep (with RT kernels non-raw spinlocks are
sleepable). So, gef_pic_lock has to be a real (non-sleepable) spinlock.

Signed-off-by: default avatarAnton Vorontsov <avorontsov@ru.mvista.com>
Acked-by: default avatarThomas Gleixner <tglx@linutronix.de>
Signed-off-by: default avatarKumar Gala <galak@kernel.crashing.org>
parent 43a5a01b

arch/powerpc/platforms/86xx/gef_pic.c

+7 −7
Original line number Diff line number Diff line
@@ -49,7 +49,7 @@ 
#define gef_irq_to_hw(virq)    ((unsigned int)irq_map[virq].hwirq)





static DEFINE_SPINLOCK(gef_pic_lock);

static DEFINE_RAW_SPINLOCK(gef_pic_lock);



static void __iomem *gef_pic_irq_reg_base;

static struct irq_host *gef_pic_irq_host;
@@ -118,11 +118,11 @@ static void gef_pic_mask(unsigned int virq) 


	hwirq = gef_irq_to_hw(virq);



	spin_lock_irqsave(&gef_pic_lock, flags);

	raw_spin_lock_irqsave(&gef_pic_lock, flags);

	mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0));

	mask &= ~(1 << hwirq);

	out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask);

	spin_unlock_irqrestore(&gef_pic_lock, flags);

	raw_spin_unlock_irqrestore(&gef_pic_lock, flags);

}



static void gef_pic_mask_ack(unsigned int virq)
@@ -141,11 +141,11 @@ static void gef_pic_unmask(unsigned int virq) 


	hwirq = gef_irq_to_hw(virq);



	spin_lock_irqsave(&gef_pic_lock, flags);

	raw_spin_lock_irqsave(&gef_pic_lock, flags);

	mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0));

	mask |= (1 << hwirq);

	out_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0), mask);

	spin_unlock_irqrestore(&gef_pic_lock, flags);

	raw_spin_unlock_irqrestore(&gef_pic_lock, flags);

}



static struct irq_chip gef_pic_chip = {
@@ -199,7 +199,7 @@ void __init gef_pic_init(struct device_node *np) 
	/* Map the devices registers into memory */

	gef_pic_irq_reg_base = of_iomap(np, 0);



	spin_lock_irqsave(&gef_pic_lock, flags);

	raw_spin_lock_irqsave(&gef_pic_lock, flags);



	/* Initialise everything as masked. */

	out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_INTR_MASK, 0);
@@ -208,7 +208,7 @@ void __init gef_pic_init(struct device_node *np) 
	out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU0_MCP_MASK, 0);

	out_be32(gef_pic_irq_reg_base + GEF_PIC_CPU1_MCP_MASK, 0);



	spin_unlock_irqrestore(&gef_pic_lock, flags);

	raw_spin_unlock_irqrestore(&gef_pic_lock, flags);



	/* Map controller */

	gef_pic_cascade_irq = irq_of_parse_and_map(np, 0);