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Commit 6f304eb2 authored by Mike McCormack's avatar Mike McCormack Committed by Greg Kroah-Hartman
Browse files

staging: rtl8192e: Remove rf_chip variable, hardcode to RF_8256 



Signed-off-by: default avatarMike McCormack <mikem@ring3k.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@suse.de>
parent d2bddcf8

drivers/staging/rtl8192e/r8190_rtl8256.c

+117 −129
Original line number Diff line number Diff line
@@ -299,10 +299,7 @@ void PHY_SetRF8256OFDMTxPower(struct net_device* dev, u8 powerlevel) 


#define MAX_DOZE_WAITING_TIMES_9x 64

static bool

SetRFPowerState8190(

	struct net_device* dev,

	RT_RF_POWER_STATE	eRFPowerState

	)

SetRFPowerState8190(struct net_device *dev, RT_RF_POWER_STATE eRFPowerState)

{

	struct r8192_priv *priv = ieee80211_priv(dev);

	PRT_POWER_SAVE_CONTROL	pPSC = (PRT_POWER_SAVE_CONTROL)(&(priv->ieee80211->PowerSaveControl));
@@ -314,9 +311,6 @@ SetRFPowerState8190( 
		return false;

	priv->SetRFPowerStateInProgress = true;



	switch(priv->rf_chip)

	{

		case RF_8256:

	switch( eRFPowerState )

	{

	case eRfOn:
@@ -433,13 +427,14 @@ SetRFPowerState8190( 




		if (pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC && !RT_IN_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC))

					{ // Disable all components.

		{

			/* Disable all components. */

			NicIFDisableNIC(dev);

			RT_SET_PS_LEVEL(pPSC, RT_RF_OFF_LEVL_HALT_NIC);

		}

		else if (!(pPSC->RegRfPsLevel & RT_RF_OFF_LEVL_HALT_NIC))

					{ // Normal case.

				  		// IPS should go to this.

		{

			/* Normal case - IPS should go to this. */

			PHY_SetRtl8192eRfOff(dev);

		}

		break;
@@ -450,13 +445,6 @@ SetRFPowerState8190( 
		break;

	}



		break;



		default:

			RT_TRACE(COMP_ERR, "SetRFPowerState8190(): Unknown RF type\n");

			break;

	}



	if(bResult)

	{

		// Update current RF state variable.

drivers/staging/rtl8192e/r8192E.h

+0 −10
Original line number Diff line number Diff line
@@ -543,15 +543,6 @@ typedef struct _BB_REGISTER_DEFINITION{ 
	u32 rfLSSIReadBack; 	//LSSI RF readback data //		0x8a0~0x8af [16 bytes]

}BB_REGISTER_DEFINITION_T, *PBB_REGISTER_DEFINITION_T;



typedef enum _RT_RF_TYPE_819xU{

        RF_TYPE_MIN = 0,

        RF_8225,

        RF_8256,

        RF_8258,

        RF_PSEUDO_11N = 4,

}RT_RF_TYPE_819xU, *PRT_RF_TYPE_819xU;





typedef struct _rate_adaptive

{

	u8				rate_adaptive_disabled;
@@ -852,7 +843,6 @@ typedef struct r8192_priv 
	struct semaphore wx_sem;

	struct semaphore rf_sem; //used to lock rf write operation added by wb, modified by david

	u8 rf_type; /* 0 means 1T2R, 1 means 2T4R */

	RT_RF_TYPE_819xU rf_chip;



	short (*rf_set_sens)(struct net_device *dev,short sens);

	u8 (*rf_set_chan)(struct net_device *dev,u8 ch);

drivers/staging/rtl8192e/r8192E_core.c

+5 −29
Original line number Diff line number Diff line
@@ -152,15 +152,9 @@ static void rtl819x_set_channel_map(u8 channel_plan, struct r8192_priv* priv) 
			Dot11d_Init(ieee);

			ieee->bGlobalDomain = false;

                        //acturally 8225 & 8256 rf chip only support B,G,24N mode

                        if ((priv->rf_chip == RF_8225) || (priv->rf_chip == RF_8256))

			{

			min_chan = 1;

			max_chan = 14;

			}

			else

			{

				RT_TRACE(COMP_ERR, "unknown rf chip, can't set channel map in function:%s()\n", __FUNCTION__);

			}



			if (ChannelPlan[channel_plan].Len != 0){

				// Clear old channel map

				memset(GET_DOT11D_INFO(ieee)->channel_map, 0, sizeof(GET_DOT11D_INFO(ieee)->channel_map));
@@ -1834,23 +1828,7 @@ static void rtl8192_refresh_supportrate(struct r8192_priv* priv) 


static u8 rtl8192_getSupportedWireleeMode(struct net_device *dev)

{

	struct r8192_priv *priv = ieee80211_priv(dev);

	u8 ret = 0;

	switch(priv->rf_chip)

	{

		case RF_8225:

		case RF_8256:

		case RF_PSEUDO_11N:

			ret = (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);

			break;

		case RF_8258:

			ret = (WIRELESS_MODE_A|WIRELESS_MODE_N_5G);

			break;

		default:

			ret = WIRELESS_MODE_B;

			break;

	}

	return ret;

	return (WIRELESS_MODE_N_24G|WIRELESS_MODE_G|WIRELESS_MODE_B);

}



static void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode)
@@ -2480,8 +2458,6 @@ static void rtl8192_read_eeprom_info(struct r8192_priv *priv) 


	//1 Make a copy for following variables and we can change them if we want



	priv->rf_chip= RF_8256;



	if(priv->RegChannelPlan == 0xf)

	{

		priv->ChannelPlan = priv->eeprom_ChannelPlan;

drivers/staging/rtl8192e/r819xE_phy.c

+63 −191
Original line number Diff line number Diff line
@@ -669,8 +669,6 @@ static u32 rtl8192_phy_RFSerialRead(struct net_device* dev, RF90_RADIO_PATH_E eR 
	Offset &= 0x3f;



	//switch page for 8256 RF IC

	if (priv->rf_chip == RF_8256)

	{

	//analog to digital off, for protection

	rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);// 0x88c[11:8]

	if (Offset >= 31)
@@ -692,12 +690,7 @@ static u32 rtl8192_phy_RFSerialRead(struct net_device* dev, RF90_RADIO_PATH_E eR 
	}

	else

		NewOffset = Offset;

	}

	else

	{

		RT_TRACE((COMP_PHY|COMP_ERR), "check RF type here, need to be 8256\n");

		NewOffset = Offset;

	}



	//put desired read addr to LSSI control Register

	rtl8192_setBBreg(dev, pPhyReg->rfHSSIPara2, bLSSIReadAddress, NewOffset);

	//Issue a posedge trigger
@@ -713,8 +706,6 @@ static u32 rtl8192_phy_RFSerialRead(struct net_device* dev, RF90_RADIO_PATH_E eR 




	// Switch back to Reg_Mode0;

	if(priv->rf_chip == RF_8256)

	{

	priv->RfReg0Value[eRFPath] &= 0xebf;



	rtl8192_setBBreg(
@@ -725,11 +716,8 @@ static u32 rtl8192_phy_RFSerialRead(struct net_device* dev, RF90_RADIO_PATH_E eR 


	//analog to digital on

	rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);// 0x88c[9:8]

	}





	return ret;



}



/******************************************************************************
@@ -759,8 +747,6 @@ static void rtl8192_phy_RFSerialWrite(struct net_device* dev, RF90_RADIO_PATH_E 
	BB_REGISTER_DEFINITION_T	*pPhyReg = &priv->PHYRegDef[eRFPath];



	Offset &= 0x3f;

	if (priv->rf_chip == RF_8256)

	{



	//analog to digital off, for protection

	rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0xf00, 0x0);// 0x88c[11:8]
@@ -780,12 +766,6 @@ static void rtl8192_phy_RFSerialWrite(struct net_device* dev, RF90_RADIO_PATH_E 
	}

	else

		NewOffset = Offset;

	}

	else

	{

		RT_TRACE((COMP_PHY|COMP_ERR), "check RF type here, need to be 8256\n");

		NewOffset = Offset;

	}



	// Put write addr in [5:0]  and write data in [31:16]

	DataAndAddr = (Data<<16) | (NewOffset&0x3f);
@@ -798,8 +778,6 @@ static void rtl8192_phy_RFSerialWrite(struct net_device* dev, RF90_RADIO_PATH_E 
		priv->RfReg0Value[eRFPath] = Data;



	// Switch back to Reg_Mode0;

 	if(priv->rf_chip == RF_8256)

	{

	if(Offset != 0)

	{

		priv->RfReg0Value[eRFPath] &= 0xebf;
@@ -812,7 +790,6 @@ static void rtl8192_phy_RFSerialWrite(struct net_device* dev, RF90_RADIO_PATH_E 
	//analog to digital on

	rtl8192_setBBreg(dev, rFPGA0_AnalogParameter4, 0x300, 0x3);// 0x88c[9:8]

}

}



/******************************************************************************

 *function:  This function set specific bits to RF register
@@ -1555,22 +1532,8 @@ void rtl8192_phy_setTxPower(struct net_device* dev, u8 channel) 
	pHalData->CurrentCckTxPwrIdx = powerlevel;

	pHalData->CurrentOfdm24GTxPwrIdx = powerlevelOFDM24G;

#endif

	switch(priv->rf_chip)

	{

	case RF_8225:

	//	PHY_SetRF8225CckTxPower(Adapter, powerlevel);

	//	PHY_SetRF8225OfdmTxPower(Adapter, powerlevelOFDM24G);

		break;

	case RF_8256:

	PHY_SetRF8256CCKTxPower(dev, powerlevel); //need further implement

	PHY_SetRF8256OFDMTxPower(dev, powerlevelOFDM24G);

		break;

	case RF_8258:

		break;

	default:

		RT_TRACE(COMP_ERR, "unknown rf chip in funtion %s()\n", __FUNCTION__);

		break;

	}

}



/******************************************************************************
@@ -1581,28 +1544,7 @@ void rtl8192_phy_setTxPower(struct net_device* dev, u8 channel) 
 * ***************************************************************************/

RT_STATUS rtl8192_phy_RFConfig(struct net_device* dev)

{

	struct r8192_priv *priv = ieee80211_priv(dev);

	RT_STATUS rtStatus = RT_STATUS_SUCCESS;

	switch(priv->rf_chip)

	{

		case RF_8225:

//			rtStatus = PHY_RF8225_Config(Adapter);

			break;

		case RF_8256:

			rtStatus = PHY_RF8256_Config(dev);

			break;



		case RF_8258:

			break;

		case RF_PSEUDO_11N:

		//rtStatus = PHY_RF8225_Config(Adapter);

		break;



		default:

			RT_TRACE(COMP_ERR, "error chip id\n");

			break;

	}

	return rtStatus;

	return PHY_RF8256_Config(dev);

}



/******************************************************************************
@@ -1699,27 +1641,10 @@ static void rtl8192_SetTxPowerLevel(struct net_device *dev, u8 channel) 
	u8	powerlevel = priv->TxPowerLevelCCK[channel-1];

	u8	powerlevelOFDM24G = priv->TxPowerLevelOFDM24G[channel-1];



	switch(priv->rf_chip)

	{

	case RF_8225:

#ifdef TO_DO_LIST

		PHY_SetRF8225CckTxPower(Adapter, powerlevel);

		PHY_SetRF8225OfdmTxPower(Adapter, powerlevelOFDM24G);

#endif

		break;



	case RF_8256:

	PHY_SetRF8256CCKTxPower(dev, powerlevel);

	PHY_SetRF8256OFDMTxPower(dev, powerlevelOFDM24G);

		break;



	case RF_8258:

		break;

	default:

		RT_TRACE(COMP_ERR, "unknown rf chip ID in rtl8192_SetTxPowerLevel()\n");

		break;

	}

}



/****************************************************************************************

 *function:  This function set command table variable(struct SwChnlCmd).

 *   input:  SwChnlCmd*		CmdTable 	//table to be set.
@@ -1823,21 +1748,7 @@ static u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel, u8* s 


		// <3> Fill up RF dependent command.

		RfDependCmdCnt = 0;

		switch( priv->rf_chip )

		{

		case RF_8225:

			if (!(channel >= 1 && channel <= 14))

			{

				RT_TRACE(COMP_ERR, "illegal channel for Zebra 8225: %d\n", channel);

				return false;

			}

			rtl8192_phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT,

				CmdID_RF_WriteReg, rZebra1_Channel, RF_CHANNEL_TABLE_ZEBRA[channel], 10);

			rtl8192_phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT,

				CmdID_End, 0, 0, 0);

			break;



		case RF_8256:

		// TEST!! This is not the table for 8256!!

		if (!(channel >= 1 && channel <= 14))

		{
@@ -1848,17 +1759,6 @@ static u8 rtl8192_phy_SwChnlStepByStep(struct net_device *dev, u8 channel, u8* s 
			CmdID_RF_WriteReg, rZebra1_Channel, channel, 10);

		rtl8192_phy_SetSwChnlCmdArray(RfDependCmd, RfDependCmdCnt++, MAX_RFDEPENDCMD_CNT,

		CmdID_End, 0, 0, 0);

			break;



		case RF_8258:

			break;



		default:

			RT_TRACE(COMP_ERR, "Unknown RFChipID: %d\n", priv->rf_chip);

			return false;

			break;

		}





		do{

			switch(*stage)
@@ -2149,11 +2049,6 @@ void rtl8192_SetBWModeWorkItem(struct net_device *dev) 
					priv->CurrentChannelBW == HT_CHANNEL_WIDTH_20?"20MHz":"40MHz")





	if(priv->rf_chip== RF_PSEUDO_11N)

	{

		priv->SetBWModeInProgress= false;

		return;

	}

	if(!priv->up)

	{

		priv->SetBWModeInProgress= false;
@@ -2241,30 +2136,7 @@ void rtl8192_SetBWModeWorkItem(struct net_device *dev) 
	//Skip over setting of J-mode in BB register here. Default value is "None J mode". Emily 20070315



	//<3>Set RF related register

	switch( priv->rf_chip )

	{

		case RF_8225:

#ifdef TO_DO_LIST

			PHY_SetRF8225Bandwidth(Adapter, pHalData->CurrentChannelBW);

#endif

			break;



		case RF_8256:

	PHY_SetRF8256Bandwidth(dev, priv->CurrentChannelBW);

			break;



		case RF_8258:

			// PHY_SetRF8258Bandwidth();

			break;



		case RF_PSEUDO_11N:

			// Do Nothing

			break;



		default:

			RT_TRACE(COMP_ERR, "Unknown RFChipID: %d\n", priv->rf_chip);

			break;

	}



	atomic_dec(&(priv->ieee80211->atm_swbw));

	priv->SetBWModeInProgress= false;