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Commit 6f244c9c authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'at91-soc' of git://github.com/at91linux/linux-at91 into late/all

From Nicolas Ferre:
AT91 SoC update for 3.12 take 1
- enable kernel uncompress information output for
  SoC where it was missing: at91sam9n12 and sama5d3
- addition of at91rm9200 to the generic at91_dt_defconfig

* tag 'at91-soc' of git://github.com/at91linux/linux-at91:
  ARM: at91: at91_dt_defconfig: enable rm9200 support
  ARM: at91: sam9n12: enable kernel uncompress info output
  ARM: at91: sama5: enable kernel uncompress info output
  ARM: at91: include sama5d3.h into hardware.h
  ARM: at91: sama5d3: add definition for usart base address
parents ef2fd3b1 746831d5
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+3 −1
Original line number Diff line number Diff line
@@ -14,11 +14,13 @@ CONFIG_MODULE_UNLOAD=y
# CONFIG_IOSCHED_DEADLINE is not set
# CONFIG_IOSCHED_CFQ is not set
CONFIG_ARCH_AT91=y
CONFIG_SOC_AT91RM9200=y
CONFIG_SOC_AT91SAM9260=y
CONFIG_SOC_AT91SAM9263=y
CONFIG_SOC_AT91SAM9G45=y
CONFIG_SOC_AT91SAM9X5=y
CONFIG_SOC_AT91SAM9N12=y
CONFIG_MACH_AT91RM9200_DT=y
CONFIG_MACH_AT91SAM9_DT=y
CONFIG_AT91_PROGRAMMABLE_CLOCKS=y
CONFIG_AT91_TIMER_HZ=128
@@ -62,6 +64,7 @@ CONFIG_MTD=y
CONFIG_MTD_CMDLINE_PARTS=y
CONFIG_MTD_CHAR=y
CONFIG_MTD_BLOCK=y
CONFIG_MTD_DATAFLASH=y
CONFIG_MTD_NAND=y
CONFIG_MTD_NAND_ATMEL=y
CONFIG_MTD_UBI=y
@@ -78,7 +81,6 @@ CONFIG_BLK_DEV_SD=y
CONFIG_SCSI_MULTI_LUN=y
# CONFIG_SCSI_LOWLEVEL is not set
CONFIG_NETDEVICES=y
CONFIG_MII=y
CONFIG_MACB=y
# CONFIG_NET_VENDOR_BROADCOM is not set
# CONFIG_NET_VENDOR_FARADAY is not set
+1 −0
Original line number Diff line number Diff line
@@ -33,6 +33,7 @@
#include <mach/at91sam9g45.h>
#include <mach/at91sam9x5.h>
#include <mach/at91sam9n12.h>
#include <mach/sama5d3.h>

/*
 * On all at91 except rm9200 and x40 have the System Controller starts
+8 −0
Original line number Diff line number Diff line
@@ -64,6 +64,14 @@
#define SAMA5D3_ID_TRNG		45	/* True Random Generator Number */
#define SAMA5D3_ID_IRQ0		47	/* Advanced Interrupt Controller (IRQ0) */

/*
 * User Peripheral physical base addresses.
 */
#define SAMA5D3_BASE_USART0	0xf001c000
#define SAMA5D3_BASE_USART1	0xf0020000
#define SAMA5D3_BASE_USART2	0xf8020000
#define SAMA5D3_BASE_USART3	0xf8024000

/*
 * Internal Memory
 */
+13 −0
Original line number Diff line number Diff line
@@ -94,6 +94,15 @@ static const u32 uarts_sam9x5[] = {
	0,
};

static const u32 uarts_sama5[] = {
	AT91_BASE_DBGU1,
	SAMA5D3_BASE_USART0,
	SAMA5D3_BASE_USART1,
	SAMA5D3_BASE_USART2,
	SAMA5D3_BASE_USART3,
	0,
};

static inline const u32* decomp_soc_detect(void __iomem *dbgu_base)
{
	u32 cidr, socid;
@@ -121,8 +130,12 @@ static inline const u32* decomp_soc_detect(void __iomem *dbgu_base)
	case ARCH_ID_AT91SAM9RL64:
		return uarts_sam9rl;

	case ARCH_ID_AT91SAM9N12:
	case ARCH_ID_AT91SAM9X5:
		return uarts_sam9x5;

	case ARCH_ID_SAMA5D3:
		return uarts_sama5;
	}

	/* at91sam9g10 */