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Commit 6decffd5 authored by Dave Jiang's avatar Dave Jiang Committed by Vinod Koul
Browse files

ioat: remove chanerr mask setting for IOAT v3.x 



The existing code set a value in the PCI_CHANERRMSK_INT register
for a workaround to address a pre-silicon bug on the Intel 5520 IO hub that
has been fixed when the hardware was released. There is no need for this
code.

Signed-off-by: default avatarDave Jiang <dave.jiang@intel.com>
Signed-off-by: default avatarDan Williams <djbw@fb.com>
parent 1a363068

drivers/dma/ioat/dma_v3.c

+1 −6
Original line number Diff line number Diff line
@@ -1168,12 +1168,7 @@ static int ioat3_reset_hw(struct ioat_chan_common *chan) 
	chanerr = readl(chan->reg_base + IOAT_CHANERR_OFFSET);

	writel(chanerr, chan->reg_base + IOAT_CHANERR_OFFSET);



	/* -= IOAT ver.3 workarounds =- */

	/* Write CHANERRMSK_INT with 3E07h to mask out the errors

	 * that can cause stability issues for IOAT ver.3, and clear any

	 * pending errors

	 */

	pci_write_config_dword(pdev, IOAT_PCI_CHANERRMASK_INT_OFFSET, 0x3e07);

	/* clear any pending errors */

	err = pci_read_config_dword(pdev, IOAT_PCI_CHANERR_INT_OFFSET, &chanerr);

	if (err) {

		dev_err(&pdev->dev, "channel error register unreachable\n");