Loading arch/sparc/include/asm/bitops_32.h +1 −0 Original line number Diff line number Diff line Loading @@ -98,6 +98,7 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr) #include <asm-generic/bitops/sched.h> #include <asm-generic/bitops/ffs.h> #include <asm-generic/bitops/fls.h> #include <asm-generic/bitops/__fls.h> #include <asm-generic/bitops/fls64.h> #include <asm-generic/bitops/hweight.h> #include <asm-generic/bitops/lock.h> Loading arch/sparc64/kernel/ptrace.c +1 −1 Original line number Diff line number Diff line Loading @@ -1014,7 +1014,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) break; case PTRACE_SETFPREGS64: ret = copy_regset_to_user(child, view, REGSET_FP, ret = copy_regset_from_user(child, view, REGSET_FP, 0 * sizeof(u64), 33 * sizeof(u64), fps); Loading arch/sparc64/kernel/visemul.c +4 −2 Original line number Diff line number Diff line Loading @@ -131,7 +131,7 @@ #define VIS_OPF_SHIFT 5 #define VIS_OPF_MASK (0x1ff << VIS_OPF_SHIFT) #define RS1(INSN) (((INSN) >> 24) & 0x1f) #define RS1(INSN) (((INSN) >> 14) & 0x1f) #define RS2(INSN) (((INSN) >> 0) & 0x1f) #define RD(INSN) (((INSN) >> 25) & 0x1f) Loading Loading @@ -445,7 +445,7 @@ static void pdist(struct pt_regs *regs, unsigned int insn) unsigned long i; rs1 = fpd_regval(f, RS1(insn)); rs2 = fpd_regval(f, RS1(insn)); rs2 = fpd_regval(f, RS2(insn)); rd = fpd_regaddr(f, RD(insn)); rd_val = *rd; Loading Loading @@ -807,6 +807,8 @@ int vis_emul(struct pt_regs *regs, unsigned int insn) if (get_user(insn, (u32 __user *) pc)) return -EFAULT; save_and_clear_fpu(); opf = (insn & VIS_OPF_MASK) >> VIS_OPF_SHIFT; switch (opf) { default: Loading Loading
arch/sparc/include/asm/bitops_32.h +1 −0 Original line number Diff line number Diff line Loading @@ -98,6 +98,7 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr) #include <asm-generic/bitops/sched.h> #include <asm-generic/bitops/ffs.h> #include <asm-generic/bitops/fls.h> #include <asm-generic/bitops/__fls.h> #include <asm-generic/bitops/fls64.h> #include <asm-generic/bitops/hweight.h> #include <asm-generic/bitops/lock.h> Loading
arch/sparc64/kernel/ptrace.c +1 −1 Original line number Diff line number Diff line Loading @@ -1014,7 +1014,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data) break; case PTRACE_SETFPREGS64: ret = copy_regset_to_user(child, view, REGSET_FP, ret = copy_regset_from_user(child, view, REGSET_FP, 0 * sizeof(u64), 33 * sizeof(u64), fps); Loading
arch/sparc64/kernel/visemul.c +4 −2 Original line number Diff line number Diff line Loading @@ -131,7 +131,7 @@ #define VIS_OPF_SHIFT 5 #define VIS_OPF_MASK (0x1ff << VIS_OPF_SHIFT) #define RS1(INSN) (((INSN) >> 24) & 0x1f) #define RS1(INSN) (((INSN) >> 14) & 0x1f) #define RS2(INSN) (((INSN) >> 0) & 0x1f) #define RD(INSN) (((INSN) >> 25) & 0x1f) Loading Loading @@ -445,7 +445,7 @@ static void pdist(struct pt_regs *regs, unsigned int insn) unsigned long i; rs1 = fpd_regval(f, RS1(insn)); rs2 = fpd_regval(f, RS1(insn)); rs2 = fpd_regval(f, RS2(insn)); rd = fpd_regaddr(f, RD(insn)); rd_val = *rd; Loading Loading @@ -807,6 +807,8 @@ int vis_emul(struct pt_regs *regs, unsigned int insn) if (get_user(insn, (u32 __user *) pc)) return -EFAULT; save_and_clear_fpu(); opf = (insn & VIS_OPF_MASK) >> VIS_OPF_SHIFT; switch (opf) { default: Loading