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Commit 6cd62235 authored by Shawn Guo's avatar Shawn Guo
Browse files

ARM: imx6q: add the missing cko output selection 



The clock output on imx6q CCM_CLKO1 pad is not always cko1 clock, and
there is a multiplexer to select between cko1 and cko2.  Add this
missing selection as the clock cko.

Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
parent 6526bb3c

Documentation/devicetree/bindings/clock/imx6q-clock.txt

+1 −0
Original line number Original line Diff line number Diff line
@@ -213,6 +213,7 @@ clocks and IDs. 
	cko2_sel      		198

	cko2_sel      		198

	cko2_podf      		199

	cko2_podf      		199

	cko2      		200

	cko2      		200

	cko      		201





Examples:

Examples:

arch/arm/mach-imx/clk-imx6q.c

+3 −1
Original line number Original line Diff line number Diff line
@@ -216,6 +216,7 @@ static const char *cko2_sels[] = { 
	"ldb_di0", "ldb_di1", "esai", "eim_slow",

	"ldb_di0", "ldb_di1", "esai", "eim_slow",

	"uart_serial", "spdif", "asrc", "hsi_tx",

	"uart_serial", "spdif", "asrc", "hsi_tx",

};

};

static const char *cko_sels[] = { "cko1", "cko2", };





enum mx6q_clks {

enum mx6q_clks {

	dummy, ckil, ckih, osc, pll2_pfd0_352m, pll2_pfd1_594m, pll2_pfd2_396m,

	dummy, ckil, ckih, osc, pll2_pfd0_352m, pll2_pfd1_594m, pll2_pfd2_396m,
@@ -250,7 +251,7 @@ enum mx6q_clks { 
	ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2, ldb_di0_div_3_5, ldb_di1_div_3_5,

	ssi2_ipg, ssi3_ipg, rom, usbphy1, usbphy2, ldb_di0_div_3_5, ldb_di1_div_3_5,

	sata_ref, sata_ref_100m, pcie_ref, pcie_ref_125m, enet_ref, usbphy1_gate,

	sata_ref, sata_ref_100m, pcie_ref, pcie_ref_125m, enet_ref, usbphy1_gate,

	usbphy2_gate, pll4_post_div, pll5_post_div, pll5_video_div, eim_slow,

	usbphy2_gate, pll4_post_div, pll5_post_div, pll5_video_div, eim_slow,

	spdif, cko2_sel, cko2_podf, cko2, clk_max

	spdif, cko2_sel, cko2_podf, cko2, cko, clk_max

};

};





static struct clk *clk[clk_max];

static struct clk *clk[clk_max];
@@ -409,6 +410,7 @@ static void __init imx6q_clocks_init(struct device_node *ccm_node) 
	clk[vpu_axi_sel]      = imx_clk_mux("vpu_axi_sel",      base + 0x18, 14, 2, vpu_axi_sels,      ARRAY_SIZE(vpu_axi_sels));

	clk[vpu_axi_sel]      = imx_clk_mux("vpu_axi_sel",      base + 0x18, 14, 2, vpu_axi_sels,      ARRAY_SIZE(vpu_axi_sels));

	clk[cko1_sel]         = imx_clk_mux("cko1_sel",         base + 0x60, 0,  4, cko1_sels,         ARRAY_SIZE(cko1_sels));

	clk[cko1_sel]         = imx_clk_mux("cko1_sel",         base + 0x60, 0,  4, cko1_sels,         ARRAY_SIZE(cko1_sels));

	clk[cko2_sel]         = imx_clk_mux("cko2_sel",         base + 0x60, 16, 5, cko2_sels,         ARRAY_SIZE(cko2_sels));

	clk[cko2_sel]         = imx_clk_mux("cko2_sel",         base + 0x60, 16, 5, cko2_sels,         ARRAY_SIZE(cko2_sels));

	clk[cko]              = imx_clk_mux("cko",              base + 0x60, 8, 1,  cko_sels,          ARRAY_SIZE(cko_sels));





	/*                              name         reg      shift width busy: reg, shift parent_names  num_parents */

	/*                              name         reg      shift width busy: reg, shift parent_names  num_parents */

	clk[periph]  = imx_clk_busy_mux("periph",  base + 0x14, 25,  1,   base + 0x48, 5,  periph_sels,  ARRAY_SIZE(periph_sels));

	clk[periph]  = imx_clk_busy_mux("periph",  base + 0x14, 25,  1,   base + 0x48, 5,  periph_sels,  ARRAY_SIZE(periph_sels));