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Commit 6b4fee24 authored by Catalin Marinas's avatar Catalin Marinas
Browse files

arm64: Remove asm/pgtable-*level-hwdef.h files 



The macros in these files can easily be computed based on PAGE_SHIFT and
VA_BITS, so just remove them and add the corresponding macros to
asm/pgtable-hwdef.h

Signed-off-by: default avatarCatalin Marinas <catalin.marinas@arm.com>
Tested-by: default avatarJungseok Lee <jungseoklee85@gmail.com>
parent abe669d7

arch/arm64/include/asm/pgtable-2level-hwdef.h

deleted100644 → 0
+0 −43
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2012 ARM Ltd.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program.  If not, see <http://www.gnu.org/licenses/>.

 */

#ifndef __ASM_PGTABLE_2LEVEL_HWDEF_H

#define __ASM_PGTABLE_2LEVEL_HWDEF_H



/*

 * With LPAE and 64KB pages, there are 2 levels of page tables. Each level has

 * 8192 entries of 8 bytes each, occupying a 64KB page. Levels 0 and 1 are not

 * used. The 2nd level table (PGD for Linux) can cover a range of 4TB, each

 * entry representing 512MB. The user and kernel address spaces are limited to

 * 4TB in the 64KB page configuration.

 */

#define PTRS_PER_PTE		8192

#define PTRS_PER_PGD		8192



/*

 * PGDIR_SHIFT determines the size a top-level page table entry can map.

 */

#define PGDIR_SHIFT		29

#define PGDIR_SIZE		(_AC(1, UL) << PGDIR_SHIFT)

#define PGDIR_MASK		(~(PGDIR_SIZE-1))



/*

 * section address mask and size definitions.

 */

#define SECTION_SHIFT		29

#define SECTION_SIZE		(_AC(1, UL) << SECTION_SHIFT)

#define SECTION_MASK		(~(SECTION_SIZE-1))



#endif

arch/arm64/include/asm/pgtable-3level-hwdef.h

deleted100644 → 0
+0 −50
Original line number Diff line number Diff line 
/*

 * Copyright (C) 2012 ARM Ltd.

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program.  If not, see <http://www.gnu.org/licenses/>.

 */

#ifndef __ASM_PGTABLE_3LEVEL_HWDEF_H

#define __ASM_PGTABLE_3LEVEL_HWDEF_H



/*

 * With LPAE and 4KB pages, there are 3 levels of page tables. Each level has

 * 512 entries of 8 bytes each, occupying a 4K page. The first level table

 * covers a range of 512GB, each entry representing 1GB. The user and kernel

 * address spaces are limited to 512GB each.

 */

#define PTRS_PER_PTE		512

#define PTRS_PER_PMD		512

#define PTRS_PER_PGD		512



/*

 * PGDIR_SHIFT determines the size a top-level page table entry can map.

 */

#define PGDIR_SHIFT		30

#define PGDIR_SIZE		(_AC(1, UL) << PGDIR_SHIFT)

#define PGDIR_MASK		(~(PGDIR_SIZE-1))



/*

 * PMD_SHIFT determines the size a middle-level page table entry can map.

 */

#define PMD_SHIFT		21

#define PMD_SIZE		(_AC(1, UL) << PMD_SHIFT)

#define PMD_MASK		(~(PMD_SIZE-1))



/*

 * section address mask and size definitions.

 */

#define SECTION_SHIFT		21

#define SECTION_SIZE		(_AC(1, UL) << SECTION_SHIFT)

#define SECTION_MASK		(~(SECTION_SIZE-1))



#endif

arch/arm64/include/asm/pgtable-4level-hwdef.h

deleted100644 → 0
+0 −50
Original line number Diff line number Diff line 
/*

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 *

 * This program is distributed in the hope that it will be useful,

 * but WITHOUT ANY WARRANTY; without even the implied warranty of

 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

 * GNU General Public License for more details.

 *

 * You should have received a copy of the GNU General Public License

 * along with this program.  If not, see <http://www.gnu.org/licenses/>.

 */

#ifndef __ASM_PGTABLE_4LEVEL_HWDEF_H

#define __ASM_PGTABLE_4LEVEL_HWDEF_H



#define PTRS_PER_PTE		512

#define PTRS_PER_PMD		512

#define PTRS_PER_PUD		512

#define PTRS_PER_PGD		512



/*

 * PGDIR_SHIFT determines the size a top-level page table entry can map.

 */

#define PGDIR_SHIFT		39

#define PGDIR_SIZE		(_AC(1, UL) << PGDIR_SHIFT)

#define PGDIR_MASK		(~(PGDIR_SIZE-1))



/*

 * PUD_SHIFT determines the size the second level page table entry can map.

 */

#define PUD_SHIFT		30

#define PUD_SIZE		(_AC(1, UL) << PUD_SHIFT)

#define PUD_MASK		(~(PUD_SIZE-1))



/*

 * PMD_SHIFT determines the size the third level page table entry can map.

 */

#define PMD_SHIFT		21

#define PMD_SIZE		(_AC(1, UL) << PMD_SHIFT)

#define PMD_MASK		(~(PMD_SIZE-1))



/*

 * section address mask and size definitions.

 */

#define SECTION_SHIFT		21

#define SECTION_SIZE		(_AC(1, UL) << SECTION_SHIFT)

#define SECTION_MASK		(~(SECTION_SIZE-1))



#endif

arch/arm64/include/asm/pgtable-hwdef.h

+36 −6
Original line number Diff line number Diff line
@@ -16,14 +16,44 @@ 
#ifndef __ASM_PGTABLE_HWDEF_H

#define __ASM_PGTABLE_HWDEF_H



#if CONFIG_ARM64_PGTABLE_LEVELS == 2

#include <asm/pgtable-2level-hwdef.h>

#elif CONFIG_ARM64_PGTABLE_LEVELS == 3

#include <asm/pgtable-3level-hwdef.h>

#else

#include <asm/pgtable-4level-hwdef.h>

#define PTRS_PER_PTE		(1 << (PAGE_SHIFT - 3))



/*

 * PMD_SHIFT determines the size a level 2 page table entry can map.

 */

#if CONFIG_ARM64_PGTABLE_LEVELS > 2

#define PMD_SHIFT		((PAGE_SHIFT - 3) * 2 + 3)

#define PMD_SIZE		(_AC(1, UL) << PMD_SHIFT)

#define PMD_MASK		(~(PMD_SIZE-1))

#define PTRS_PER_PMD		PTRS_PER_PTE

#endif



/*

 * PUD_SHIFT determines the size a level 1 page table entry can map.

 */

#if CONFIG_ARM64_PGTABLE_LEVELS > 3

#define PUD_SHIFT		((PAGE_SHIFT - 3) * 3 + 3)

#define PUD_SIZE		(_AC(1, UL) << PUD_SHIFT)

#define PUD_MASK		(~(PUD_SIZE-1))

#define PTRS_PER_PUD		PTRS_PER_PTE

#endif



/*

 * PGDIR_SHIFT determines the size a top-level page table entry can map

 * (depending on the configuration, this level can be 0, 1 or 2).

 */

#define PGDIR_SHIFT		((PAGE_SHIFT - 3) * CONFIG_ARM64_PGTABLE_LEVELS + 3)

#define PGDIR_SIZE		(_AC(1, UL) << PGDIR_SHIFT)

#define PGDIR_MASK		(~(PGDIR_SIZE-1))

#define PTRS_PER_PGD		(1 << (VA_BITS - PGDIR_SHIFT))



/*

 * Section address mask and size definitions.

 */

#define SECTION_SHIFT		PMD_SHIFT

#define SECTION_SIZE		(_AC(1, UL) << SECTION_SHIFT)

#define SECTION_MASK		(~(SECTION_SIZE-1))



/*

 * Hardware page table definitions.

 *