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Commit 69f54698 authored by Shawn Guo's avatar Shawn Guo Committed by Chris Ball
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mmc: sdhci-esdhc-imx: separate transfer mode from command write for usdhc 



The combining of SDHCI_TRANSFER_MODE and SDHCI_COMMAND writes is only
required for esdhc, but not necessarily for usdhc.  Different from
esdhc where the bits for transfer mode and command are all in the same
register CMD_XFR_TYP, usdhc has a newly introduced register MIX_CTRL
to hold transfer mode bits.  So it makes more sense to separate transfer
mode from command write for usdhc.

Signed-off-by: default avatarShawn Guo <shawn.guo@linaro.org>
Tested-by: default avatarDirk Behme <dirk.behme@de.bosch.com>
Signed-off-by: default avatarChris Ball <cjb@laptop.org>
parent 881d926d

drivers/mmc/host/sdhci-esdhc-imx.c

+14 −11
Original line number Diff line number Diff line
@@ -239,10 +239,6 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) 


	switch (reg) {

	case SDHCI_TRANSFER_MODE:

		/*

		 * Postpone this write, we must do it together with a

		 * command write that is down below.

		 */

		if ((imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT)

				&& (host->cmd->opcode == SD_IO_RW_EXTENDED)

				&& (host->cmd->data->blocks > 1)
@@ -252,7 +248,18 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) 
			v |= ESDHC_VENDOR_SPEC_SDIO_QUIRK;

			writel(v, host->ioaddr + ESDHC_VENDOR_SPEC);

		}



		if (is_imx6q_usdhc(imx_data)) {

			u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);

			m = val | (m & 0xffff0000);

			writel(m, host->ioaddr + ESDHC_MIX_CTRL);

		} else {

			/*

			 * Postpone this write, we must do it together with a

			 * command write that is down below.

			 */

			imx_data->scratchpad = val;

		}

		return;

	case SDHCI_COMMAND:

		if ((host->cmd->opcode == MMC_STOP_TRANSMISSION ||
@@ -260,16 +267,12 @@ static void esdhc_writew_le(struct sdhci_host *host, u16 val, int reg) 
	            (imx_data->flags & ESDHC_FLAG_MULTIBLK_NO_INT))

			val |= SDHCI_CMD_ABORTCMD;



		if (is_imx6q_usdhc(imx_data)) {

			u32 m = readl(host->ioaddr + ESDHC_MIX_CTRL);

			m = imx_data->scratchpad | (m & 0xffff0000);

			writel(m, host->ioaddr + ESDHC_MIX_CTRL);

		if (is_imx6q_usdhc(imx_data))

			writel(val << 16,

			       host->ioaddr + SDHCI_TRANSFER_MODE);

		} else {

		else

			writel(val << 16 | imx_data->scratchpad,

			       host->ioaddr + SDHCI_TRANSFER_MODE);

		}

		return;

	case SDHCI_BLOCK_SIZE:

		val &= ~SDHCI_MAKE_BLKSZ(0x7, 0);