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Commit 671d5532 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 cpu updates from Ingo Molnar:
 "The main changes in this cycle were:

   - Improved CPU ID handling code and related enhancements (Borislav
     Petkov)

   - RDRAND fix (Len Brown)"

* 'x86-cpu-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86: Replace RDRAND forced-reseed with simple sanity check
  x86/MSR: Chop off lower 32-bit value
  x86/cpu: Fix MSR value truncation issue
  x86/cpu/amd, kvm: Satisfy guest kernel reads of IC_CFG MSR
  kvm: Add accessors for guest CPU's family, model, stepping
  x86/cpu: Unify CPU family, model, stepping calculation
parents 67c707e4 0007bccc

arch/x86/include/asm/cpu.h

+3 −0
Original line number Original line Diff line number Diff line
@@ -36,4 +36,7 @@ extern int _debug_hotplug_cpu(int cpu, int action); 




int mwait_usable(const struct cpuinfo_x86 *);

int mwait_usable(const struct cpuinfo_x86 *);





unsigned int x86_family(unsigned int sig);

unsigned int x86_model(unsigned int sig);

unsigned int x86_stepping(unsigned int sig);

#endif /* _ASM_X86_CPU_H */
 
#endif /* _ASM_X86_CPU_H */

arch/x86/include/asm/microcode.h

+7 −32
Original line number Original line Diff line number Diff line 
#ifndef _ASM_X86_MICROCODE_H

#ifndef _ASM_X86_MICROCODE_H

#define _ASM_X86_MICROCODE_H

#define _ASM_X86_MICROCODE_H





#include <asm/cpu.h>

#include <linux/earlycpio.h>

#include <linux/earlycpio.h>





#define native_rdmsr(msr, val1, val2)			\

#define native_rdmsr(msr, val1, val2)			\
@@ -95,14 +96,14 @@ static inline void __exit exit_amd_microcode(void) {} 




/*

/*

 * In early loading microcode phase on BSP, boot_cpu_data is not set up yet.

 * In early loading microcode phase on BSP, boot_cpu_data is not set up yet.

 * x86_vendor() gets vendor id for BSP.

 * x86_cpuid_vendor() gets vendor id for BSP.

 *

 *

 * In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify

 * In 32 bit AP case, accessing boot_cpu_data needs linear address. To simplify

 * coding, we still use x86_vendor() to get vendor id for AP.

 * coding, we still use x86_cpuid_vendor() to get vendor id for AP.

 *

 *

 * x86_vendor() gets vendor information directly from CPUID.

 * x86_cpuid_vendor() gets vendor information directly from CPUID.

 */

 */

static inline int x86_vendor(void)

static inline int x86_cpuid_vendor(void)

{

{

	u32 eax = 0x00000000;

	u32 eax = 0x00000000;

	u32 ebx, ecx = 0, edx;

	u32 ebx, ecx = 0, edx;
@@ -118,40 +119,14 @@ static inline int x86_vendor(void) 
	return X86_VENDOR_UNKNOWN;

	return X86_VENDOR_UNKNOWN;

}

}





static inline unsigned int __x86_family(unsigned int sig)

static inline unsigned int x86_cpuid_family(void)

{

	unsigned int x86;



	x86 = (sig >> 8) & 0xf;



	if (x86 == 0xf)

		x86 += (sig >> 20) & 0xff;



	return x86;

}



static inline unsigned int x86_family(void)

{

{

	u32 eax = 0x00000001;

	u32 eax = 0x00000001;

	u32 ebx, ecx = 0, edx;

	u32 ebx, ecx = 0, edx;





	native_cpuid(&eax, &ebx, &ecx, &edx);

	native_cpuid(&eax, &ebx, &ecx, &edx);





	return __x86_family(eax);

	return x86_family(eax);

}



static inline unsigned int x86_model(unsigned int sig)

{

	unsigned int x86, model;



	x86 = __x86_family(sig);



	model = (sig >> 4) & 0xf;



	if (x86 == 0x6 || x86 == 0xf)

		model += ((sig >> 16) & 0xf) << 4;



	return model;

}

}





#ifdef CONFIG_MICROCODE

#ifdef CONFIG_MICROCODE

arch/x86/include/asm/msr-index.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -321,6 +321,7 @@ 
#define MSR_F15H_PERF_CTR		0xc0010201

#define MSR_F15H_PERF_CTR		0xc0010201

#define MSR_F15H_NB_PERF_CTL		0xc0010240

#define MSR_F15H_NB_PERF_CTL		0xc0010240

#define MSR_F15H_NB_PERF_CTR		0xc0010241

#define MSR_F15H_NB_PERF_CTR		0xc0010241

#define MSR_F15H_IC_CFG			0xc0011021





/* Fam 10h MSRs */

/* Fam 10h MSRs */

#define MSR_FAM10H_MMIO_CONF_BASE	0xc0010058

#define MSR_FAM10H_MMIO_CONF_BASE	0xc0010058

arch/x86/include/asm/msr.h

+1 −1
Original line number Original line Diff line number Diff line
@@ -221,7 +221,7 @@ static inline void wrmsr(unsigned msr, unsigned low, unsigned high) 




static inline void wrmsrl(unsigned msr, u64 val)

static inline void wrmsrl(unsigned msr, u64 val)

{

{

	native_write_msr(msr, (u32)val, (u32)(val >> 32));

	native_write_msr(msr, (u32)(val & 0xffffffffULL), (u32)(val >> 32));

}

}





/* wrmsr with exception handling */

/* wrmsr with exception handling */

arch/x86/kernel/cpu/amd.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -678,9 +678,9 @@ static void init_amd_bd(struct cpuinfo_x86 *c) 
	 * Disable it on the affected CPUs.

	 * Disable it on the affected CPUs.

	 */

	 */

	if ((c->x86_model >= 0x02) && (c->x86_model < 0x20)) {

	if ((c->x86_model >= 0x02) && (c->x86_model < 0x20)) {

		if (!rdmsrl_safe(0xc0011021, &value) && !(value & 0x1E)) {

		if (!rdmsrl_safe(MSR_F15H_IC_CFG, &value) && !(value & 0x1E)) {

			value |= 0x1E;

			value |= 0x1E;

			wrmsrl_safe(0xc0011021, value);

			wrmsrl_safe(MSR_F15H_IC_CFG, value);

		}

		}

	}

	}

}

}