Loading drivers/dma/Kconfig +17 −21 Original line number Diff line number Diff line Loading @@ -102,7 +102,7 @@ config AXI_DMAC config COH901318 bool "ST-Ericsson COH901318 DMA support" select DMA_ENGINE depends on ARCH_U300 depends on ARCH_U300 || COMPILE_TEST help Enable support for ST-Ericsson COH 901 318 DMA. Loading @@ -114,13 +114,13 @@ config DMA_BCM2835 config DMA_JZ4740 tristate "JZ4740 DMA support" depends on MACH_JZ4740 depends on MACH_JZ4740 || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS config DMA_JZ4780 tristate "JZ4780 DMA support" depends on MACH_JZ4780 depends on MACH_JZ4780 || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS help Loading @@ -130,14 +130,14 @@ config DMA_JZ4780 config DMA_OMAP tristate "OMAP DMA support" depends on ARCH_OMAP depends on ARCH_OMAP || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS select TI_DMA_CROSSBAR if SOC_DRA7XX select TI_DMA_CROSSBAR if (SOC_DRA7XX || COMPILE_TEST) config DMA_SA11X0 tristate "SA-11x0 DMA support" depends on ARCH_SA1100 depends on ARCH_SA1100 || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS help Loading @@ -150,7 +150,6 @@ config DMA_SUN4I depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) select DMA_ENGINE select DMA_OF select DMA_VIRTUAL_CHANNELS help Enable support for the DMA controller present in the sun4i, Loading @@ -167,7 +166,7 @@ config DMA_SUN6I config EP93XX_DMA bool "Cirrus Logic EP93xx DMA support" depends on ARCH_EP93XX depends on ARCH_EP93XX || COMPILE_TEST select DMA_ENGINE help Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. Loading Loading @@ -297,16 +296,16 @@ config LPC18XX_DMAMUX config MMP_PDMA bool "MMP PDMA support" depends on (ARCH_MMP || ARCH_PXA) depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST select DMA_ENGINE help Support the MMP PDMA engine for PXA and MMP platform. config MMP_TDMA bool "MMP Two-Channel DMA support" depends on ARCH_MMP depends on ARCH_MMP || COMPILE_TEST select DMA_ENGINE select MMP_SRAM select MMP_SRAM if ARCH_MMP help Support the MMP Two-Channel DMA engine. This engine used for MMP Audio DMA and pxa910 SQU. Loading @@ -316,7 +315,6 @@ config MOXART_DMA tristate "MOXART DMA support" depends on ARCH_MOXART select DMA_ENGINE select DMA_OF select DMA_VIRTUAL_CHANNELS help Enable support for the MOXA ART SoC DMA controller. Loading Loading @@ -439,9 +437,8 @@ config STE_DMA40 config STM32_DMA bool "STMicroelectronics STM32 DMA support" depends on ARCH_STM32 depends on ARCH_STM32 || COMPILE_TEST select DMA_ENGINE select DMA_OF select DMA_VIRTUAL_CHANNELS help Enable support for the on-chip DMA controller on STMicroelectronics Loading @@ -451,7 +448,7 @@ config STM32_DMA config S3C24XX_DMAC bool "Samsung S3C24XX DMA support" depends on ARCH_S3C24XX depends on ARCH_S3C24XX || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS help Loading Loading @@ -483,10 +480,9 @@ config TEGRA20_APB_DMA config TEGRA210_ADMA bool "NVIDIA Tegra210 ADMA support" depends on ARCH_TEGRA_210_SOC depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) && PM_CLK select DMA_ENGINE select DMA_VIRTUAL_CHANNELS select PM_CLK help Support for the NVIDIA Tegra210 ADMA controller driver. The DMA controller has multiple DMA channels and is used to service Loading @@ -497,7 +493,7 @@ config TEGRA210_ADMA config TIMB_DMA tristate "Timberdale FPGA DMA support" depends on MFD_TIMBERDALE depends on MFD_TIMBERDALE || COMPILE_TEST select DMA_ENGINE help Enable support for the Timberdale FPGA DMA engine. Loading @@ -515,10 +511,10 @@ config TI_DMA_CROSSBAR config TI_EDMA bool "TI EDMA support" depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS select TI_DMA_CROSSBAR if ARCH_OMAP select TI_DMA_CROSSBAR if (ARCH_OMAP || COMPILE_TEST) default n help Enable support for the TI EDMA controller. This DMA Loading Loading @@ -561,7 +557,7 @@ config XILINX_ZYNQMP_DMA config ZX_DMA tristate "ZTE ZX296702 DMA support" depends on ARCH_ZX depends on ARCH_ZX || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS help Loading drivers/dma/coh901318.c +10 −10 Original line number Diff line number Diff line Loading @@ -1319,10 +1319,10 @@ static void coh901318_list_print(struct coh901318_chan *cohc, int i = 0; while (l) { dev_vdbg(COHC_2_DEV(cohc), "i %d, lli %p, ctrl 0x%x, src 0x%x" ", dst 0x%x, link 0x%x virt_link_addr 0x%p\n", i, l, l->control, l->src_addr, l->dst_addr, l->link_addr, l->virt_link_addr); dev_vdbg(COHC_2_DEV(cohc), "i %d, lli %p, ctrl 0x%x, src 0x%pad" ", dst 0x%pad, link 0x%pad virt_link_addr 0x%p\n", i, l, l->control, &l->src_addr, &l->dst_addr, &l->link_addr, l->virt_link_addr); i++; l = l->virt_link_addr; } Loading @@ -1335,7 +1335,7 @@ static void coh901318_list_print(struct coh901318_chan *cohc, static struct coh901318_base *debugfs_dma_base; static struct dentry *dma_dentry; static int coh901318_debugfs_read(struct file *file, char __user *buf, static ssize_t coh901318_debugfs_read(struct file *file, char __user *buf, size_t count, loff_t *f_pos) { u64 started_channels = debugfs_dma_base->pm.started_channels; Loading Loading @@ -1753,7 +1753,7 @@ static int coh901318_resume(struct dma_chan *chan) bool coh901318_filter_id(struct dma_chan *chan, void *chan_id) { unsigned int ch_nr = (unsigned int) chan_id; unsigned long ch_nr = (unsigned long) chan_id; if (ch_nr == to_coh901318_chan(chan)->id) return true; Loading Loading @@ -2234,8 +2234,8 @@ coh901318_prep_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, spin_lock_irqsave(&cohc->lock, flg); dev_vdbg(COHC_2_DEV(cohc), "[%s] channel %d src 0x%x dest 0x%x size %d\n", __func__, cohc->id, src, dest, size); "[%s] channel %d src 0x%pad dest 0x%pad size %zu\n", __func__, cohc->id, &src, &dest, size); if (flags & DMA_PREP_INTERRUPT) /* Trigger interrupt after last lli */ Loading Loading @@ -2731,8 +2731,8 @@ static int __init coh901318_probe(struct platform_device *pdev) goto err_register_of_dma; platform_set_drvdata(pdev, base); dev_info(&pdev->dev, "Initialized COH901318 DMA on virtual base 0x%08x\n", (u32) base->virtbase); dev_info(&pdev->dev, "Initialized COH901318 DMA on virtual base 0x%p\n", base->virtbase); return err; Loading drivers/dma/coh901318_lli.c +2 −2 Original line number Diff line number Diff line Loading @@ -75,7 +75,7 @@ coh901318_lli_alloc(struct coh901318_pool *pool, unsigned int len) lli = head; lli->phy_this = phy; lli->link_addr = 0x00000000; lli->virt_link_addr = 0x00000000U; lli->virt_link_addr = NULL; for (i = 1; i < len; i++) { lli_prev = lli; Loading @@ -88,7 +88,7 @@ coh901318_lli_alloc(struct coh901318_pool *pool, unsigned int len) DEBUGFS_POOL_COUNTER_ADD(pool, 1); lli->phy_this = phy; lli->link_addr = 0x00000000; lli->virt_link_addr = 0x00000000U; lli->virt_link_addr = NULL; lli_prev->link_addr = phy; lli_prev->virt_link_addr = lli; Loading drivers/dma/dma-jz4740.c +0 −2 Original line number Diff line number Diff line Loading @@ -21,8 +21,6 @@ #include <linux/irq.h> #include <linux/clk.h> #include <asm/mach-jz4740/dma.h> #include "virt-dma.h" #define JZ_DMA_NR_CHANS 6 Loading drivers/dma/dma-jz4780.c +1 −1 Original line number Diff line number Diff line Loading @@ -400,7 +400,7 @@ static struct dma_async_tx_descriptor *jz4780_dma_prep_dma_cyclic( return vchan_tx_prep(&jzchan->vchan, &desc->vdesc, flags); } struct dma_async_tx_descriptor *jz4780_dma_prep_dma_memcpy( static struct dma_async_tx_descriptor *jz4780_dma_prep_dma_memcpy( struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, size_t len, unsigned long flags) { Loading Loading
drivers/dma/Kconfig +17 −21 Original line number Diff line number Diff line Loading @@ -102,7 +102,7 @@ config AXI_DMAC config COH901318 bool "ST-Ericsson COH901318 DMA support" select DMA_ENGINE depends on ARCH_U300 depends on ARCH_U300 || COMPILE_TEST help Enable support for ST-Ericsson COH 901 318 DMA. Loading @@ -114,13 +114,13 @@ config DMA_BCM2835 config DMA_JZ4740 tristate "JZ4740 DMA support" depends on MACH_JZ4740 depends on MACH_JZ4740 || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS config DMA_JZ4780 tristate "JZ4780 DMA support" depends on MACH_JZ4780 depends on MACH_JZ4780 || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS help Loading @@ -130,14 +130,14 @@ config DMA_JZ4780 config DMA_OMAP tristate "OMAP DMA support" depends on ARCH_OMAP depends on ARCH_OMAP || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS select TI_DMA_CROSSBAR if SOC_DRA7XX select TI_DMA_CROSSBAR if (SOC_DRA7XX || COMPILE_TEST) config DMA_SA11X0 tristate "SA-11x0 DMA support" depends on ARCH_SA1100 depends on ARCH_SA1100 || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS help Loading @@ -150,7 +150,6 @@ config DMA_SUN4I depends on MACH_SUN4I || MACH_SUN5I || MACH_SUN7I default (MACH_SUN4I || MACH_SUN5I || MACH_SUN7I) select DMA_ENGINE select DMA_OF select DMA_VIRTUAL_CHANNELS help Enable support for the DMA controller present in the sun4i, Loading @@ -167,7 +166,7 @@ config DMA_SUN6I config EP93XX_DMA bool "Cirrus Logic EP93xx DMA support" depends on ARCH_EP93XX depends on ARCH_EP93XX || COMPILE_TEST select DMA_ENGINE help Enable support for the Cirrus Logic EP93xx M2P/M2M DMA controller. Loading Loading @@ -297,16 +296,16 @@ config LPC18XX_DMAMUX config MMP_PDMA bool "MMP PDMA support" depends on (ARCH_MMP || ARCH_PXA) depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST select DMA_ENGINE help Support the MMP PDMA engine for PXA and MMP platform. config MMP_TDMA bool "MMP Two-Channel DMA support" depends on ARCH_MMP depends on ARCH_MMP || COMPILE_TEST select DMA_ENGINE select MMP_SRAM select MMP_SRAM if ARCH_MMP help Support the MMP Two-Channel DMA engine. This engine used for MMP Audio DMA and pxa910 SQU. Loading @@ -316,7 +315,6 @@ config MOXART_DMA tristate "MOXART DMA support" depends on ARCH_MOXART select DMA_ENGINE select DMA_OF select DMA_VIRTUAL_CHANNELS help Enable support for the MOXA ART SoC DMA controller. Loading Loading @@ -439,9 +437,8 @@ config STE_DMA40 config STM32_DMA bool "STMicroelectronics STM32 DMA support" depends on ARCH_STM32 depends on ARCH_STM32 || COMPILE_TEST select DMA_ENGINE select DMA_OF select DMA_VIRTUAL_CHANNELS help Enable support for the on-chip DMA controller on STMicroelectronics Loading @@ -451,7 +448,7 @@ config STM32_DMA config S3C24XX_DMAC bool "Samsung S3C24XX DMA support" depends on ARCH_S3C24XX depends on ARCH_S3C24XX || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS help Loading Loading @@ -483,10 +480,9 @@ config TEGRA20_APB_DMA config TEGRA210_ADMA bool "NVIDIA Tegra210 ADMA support" depends on ARCH_TEGRA_210_SOC depends on (ARCH_TEGRA_210_SOC || COMPILE_TEST) && PM_CLK select DMA_ENGINE select DMA_VIRTUAL_CHANNELS select PM_CLK help Support for the NVIDIA Tegra210 ADMA controller driver. The DMA controller has multiple DMA channels and is used to service Loading @@ -497,7 +493,7 @@ config TEGRA210_ADMA config TIMB_DMA tristate "Timberdale FPGA DMA support" depends on MFD_TIMBERDALE depends on MFD_TIMBERDALE || COMPILE_TEST select DMA_ENGINE help Enable support for the Timberdale FPGA DMA engine. Loading @@ -515,10 +511,10 @@ config TI_DMA_CROSSBAR config TI_EDMA bool "TI EDMA support" depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE depends on ARCH_DAVINCI || ARCH_OMAP || ARCH_KEYSTONE || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS select TI_DMA_CROSSBAR if ARCH_OMAP select TI_DMA_CROSSBAR if (ARCH_OMAP || COMPILE_TEST) default n help Enable support for the TI EDMA controller. This DMA Loading Loading @@ -561,7 +557,7 @@ config XILINX_ZYNQMP_DMA config ZX_DMA tristate "ZTE ZX296702 DMA support" depends on ARCH_ZX depends on ARCH_ZX || COMPILE_TEST select DMA_ENGINE select DMA_VIRTUAL_CHANNELS help Loading
drivers/dma/coh901318.c +10 −10 Original line number Diff line number Diff line Loading @@ -1319,10 +1319,10 @@ static void coh901318_list_print(struct coh901318_chan *cohc, int i = 0; while (l) { dev_vdbg(COHC_2_DEV(cohc), "i %d, lli %p, ctrl 0x%x, src 0x%x" ", dst 0x%x, link 0x%x virt_link_addr 0x%p\n", i, l, l->control, l->src_addr, l->dst_addr, l->link_addr, l->virt_link_addr); dev_vdbg(COHC_2_DEV(cohc), "i %d, lli %p, ctrl 0x%x, src 0x%pad" ", dst 0x%pad, link 0x%pad virt_link_addr 0x%p\n", i, l, l->control, &l->src_addr, &l->dst_addr, &l->link_addr, l->virt_link_addr); i++; l = l->virt_link_addr; } Loading @@ -1335,7 +1335,7 @@ static void coh901318_list_print(struct coh901318_chan *cohc, static struct coh901318_base *debugfs_dma_base; static struct dentry *dma_dentry; static int coh901318_debugfs_read(struct file *file, char __user *buf, static ssize_t coh901318_debugfs_read(struct file *file, char __user *buf, size_t count, loff_t *f_pos) { u64 started_channels = debugfs_dma_base->pm.started_channels; Loading Loading @@ -1753,7 +1753,7 @@ static int coh901318_resume(struct dma_chan *chan) bool coh901318_filter_id(struct dma_chan *chan, void *chan_id) { unsigned int ch_nr = (unsigned int) chan_id; unsigned long ch_nr = (unsigned long) chan_id; if (ch_nr == to_coh901318_chan(chan)->id) return true; Loading Loading @@ -2234,8 +2234,8 @@ coh901318_prep_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, spin_lock_irqsave(&cohc->lock, flg); dev_vdbg(COHC_2_DEV(cohc), "[%s] channel %d src 0x%x dest 0x%x size %d\n", __func__, cohc->id, src, dest, size); "[%s] channel %d src 0x%pad dest 0x%pad size %zu\n", __func__, cohc->id, &src, &dest, size); if (flags & DMA_PREP_INTERRUPT) /* Trigger interrupt after last lli */ Loading Loading @@ -2731,8 +2731,8 @@ static int __init coh901318_probe(struct platform_device *pdev) goto err_register_of_dma; platform_set_drvdata(pdev, base); dev_info(&pdev->dev, "Initialized COH901318 DMA on virtual base 0x%08x\n", (u32) base->virtbase); dev_info(&pdev->dev, "Initialized COH901318 DMA on virtual base 0x%p\n", base->virtbase); return err; Loading
drivers/dma/coh901318_lli.c +2 −2 Original line number Diff line number Diff line Loading @@ -75,7 +75,7 @@ coh901318_lli_alloc(struct coh901318_pool *pool, unsigned int len) lli = head; lli->phy_this = phy; lli->link_addr = 0x00000000; lli->virt_link_addr = 0x00000000U; lli->virt_link_addr = NULL; for (i = 1; i < len; i++) { lli_prev = lli; Loading @@ -88,7 +88,7 @@ coh901318_lli_alloc(struct coh901318_pool *pool, unsigned int len) DEBUGFS_POOL_COUNTER_ADD(pool, 1); lli->phy_this = phy; lli->link_addr = 0x00000000; lli->virt_link_addr = 0x00000000U; lli->virt_link_addr = NULL; lli_prev->link_addr = phy; lli_prev->virt_link_addr = lli; Loading
drivers/dma/dma-jz4740.c +0 −2 Original line number Diff line number Diff line Loading @@ -21,8 +21,6 @@ #include <linux/irq.h> #include <linux/clk.h> #include <asm/mach-jz4740/dma.h> #include "virt-dma.h" #define JZ_DMA_NR_CHANS 6 Loading
drivers/dma/dma-jz4780.c +1 −1 Original line number Diff line number Diff line Loading @@ -400,7 +400,7 @@ static struct dma_async_tx_descriptor *jz4780_dma_prep_dma_cyclic( return vchan_tx_prep(&jzchan->vchan, &desc->vdesc, flags); } struct dma_async_tx_descriptor *jz4780_dma_prep_dma_memcpy( static struct dma_async_tx_descriptor *jz4780_dma_prep_dma_memcpy( struct dma_chan *chan, dma_addr_t dest, dma_addr_t src, size_t len, unsigned long flags) { Loading