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Commit 65fa22b7 authored by Ben Dooks's avatar Ben Dooks
Browse files

[ARM] S3C24XX: Split PM code from arch/arm/plat-s3c24xx/irq.c 



Split the PM code out of arch/arm/plat-s3c24xx/irq.c to
remove some of the #ifdefs being used. Also fix a couple
of places where the absecnce of a function was redefined
to the same thing.

Signed-off-by: default avatarBen Dooks <ben-linux@fluff.org>
parent 840eeeb8

arch/arm/plat-s3c24xx/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -27,6 +27,7 @@ obj-$(CONFIG_CPU_S3C244X) += s3c244x-irq.o 
obj-$(CONFIG_CPU_S3C244X)	+= s3c244x-clock.o

obj-$(CONFIG_PM_SIMTEC)		+= pm-simtec.o

obj-$(CONFIG_PM)		+= pm.o

obj-$(CONFIG_PM)		+= irq-pm.o

obj-$(CONFIG_PM)		+= sleep.o

obj-$(CONFIG_HAVE_PWM)		+= pwm.o

obj-$(CONFIG_S3C2410_CLOCK)	+= s3c2410-clock.o

arch/arm/plat-s3c24xx/include/plat/irq.h

+8 −0
Original line number Diff line number Diff line
@@ -10,6 +10,12 @@ 
 * published by the Free Software Foundation.

*/



#include <linux/io.h>



#include <mach/hardware.h>

#include <mach/regs-irq.h>

#include <mach/regs-gpio.h>



#define irqdbf(x...)

#define irqdbf2(x...)
@@ -102,7 +108,9 @@ s3c_irqsub_ack(unsigned int irqno, unsigned int parentmask, unsigned int group) 


#ifdef CONFIG_PM

extern int s3c_irq_wake(unsigned int irqno, unsigned int state);

extern int s3c_irqext_wake(unsigned int irqno, unsigned int state);

#else

#define s3c_irqext_wake NULL

#define s3c_irq_wake NULL

#endif

arch/arm/plat-s3c24xx/irq-pm.c

0 → 100644
+116 −0
Original line number Diff line number Diff line 
/* linux/arch/arm/plat-s3c24xx/irq-om.c

 *

 * Copyright (c) 2003,2004 Simtec Electronics

 *	Ben Dooks <ben@simtec.co.uk>

 *	http://armlinux.simtec.co.uk/

 *

 * S3C24XX - IRQ PM code

 *

 * This program is free software; you can redistribute it and/or modify

 * it under the terms of the GNU General Public License version 2 as

 * published by the Free Software Foundation.

 */



#include <linux/init.h>

#include <linux/module.h>

#include <linux/interrupt.h>

#include <linux/sysdev.h>



#include <plat/cpu.h>

#include <plat/pm.h>

#include <plat/irq.h>



/* state for IRQs over sleep */



/* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources

 *

 * set bit to 1 in allow bitfield to enable the wakeup settings on it

*/



unsigned long s3c_irqwake_intallow	= 1L << (IRQ_RTC - IRQ_EINT0) | 0xfL;

unsigned long s3c_irqwake_intmask	= 0xffffffffL;

unsigned long s3c_irqwake_eintallow	= 0x0000fff0L;

unsigned long s3c_irqwake_eintmask	= 0xffffffffL;



int

s3c_irq_wake(unsigned int irqno, unsigned int state)

{

	unsigned long irqbit = 1 << (irqno - IRQ_EINT0);



	if (!(s3c_irqwake_intallow & irqbit))

		return -ENOENT;



	printk(KERN_INFO "wake %s for irq %d\n",

	       state ? "enabled" : "disabled", irqno);



	if (!state)

		s3c_irqwake_intmask |= irqbit;

	else

		s3c_irqwake_intmask &= ~irqbit;



	return 0;

}



int s3c_irqext_wake(unsigned int irqno, unsigned int state)

{

	unsigned long bit = 1L << (irqno - EXTINT_OFF);



	if (!(s3c_irqwake_eintallow & bit))

		return -ENOENT;



	printk(KERN_INFO "wake %s for irq %d\n",

	       state ? "enabled" : "disabled", irqno);



	if (!state)

		s3c_irqwake_eintmask |= bit;

	else

		s3c_irqwake_eintmask &= ~bit;



	return 0;

}



static struct sleep_save irq_save[] = {

	SAVE_ITEM(S3C2410_INTMSK),

	SAVE_ITEM(S3C2410_INTSUBMSK),

};



/* the extint values move between the s3c2410/s3c2440 and the s3c2412

 * so we use an array to hold them, and to calculate the address of

 * the register at run-time

*/



static unsigned long save_extint[3];

static unsigned long save_eintflt[4];

static unsigned long save_eintmask;



int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state)

{

	unsigned int i;



	for (i = 0; i < ARRAY_SIZE(save_extint); i++)

		save_extint[i] = __raw_readl(S3C24XX_EXTINT0 + (i*4));



	for (i = 0; i < ARRAY_SIZE(save_eintflt); i++)

		save_eintflt[i] = __raw_readl(S3C24XX_EINFLT0 + (i*4));



	s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));

	save_eintmask = __raw_readl(S3C24XX_EINTMASK);



	return 0;

}



int s3c24xx_irq_resume(struct sys_device *dev)

{

	unsigned int i;



	for (i = 0; i < ARRAY_SIZE(save_extint); i++)

		__raw_writel(save_extint[i], S3C24XX_EXTINT0 + (i*4));



	for (i = 0; i < ARRAY_SIZE(save_eintflt); i++)

		__raw_writel(save_eintflt[i], S3C24XX_EINFLT0 + (i*4));



	s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));

	__raw_writel(save_eintmask, S3C24XX_EINTMASK);



	return 0;

}

arch/arm/plat-s3c24xx/irq.c

+0 −118
Original line number Diff line number Diff line
@@ -55,81 +55,16 @@ 
#include <linux/interrupt.h>

#include <linux/ioport.h>

#include <linux/sysdev.h>

#include <linux/io.h>



#include <mach/hardware.h>

#include <asm/irq.h>



#include <asm/mach/irq.h>



#include <plat/regs-irqtype.h>

#include <mach/regs-irq.h>

#include <mach/regs-gpio.h>



#include <plat/cpu.h>

#include <plat/pm.h>

#include <plat/irq.h>



/* wakeup irq control */



#ifdef CONFIG_PM



/* state for IRQs over sleep */



/* default is to allow for EINT0..EINT15, and IRQ_RTC as wakeup sources

 *

 * set bit to 1 in allow bitfield to enable the wakeup settings on it

*/



unsigned long s3c_irqwake_intallow	= 1L << (IRQ_RTC - IRQ_EINT0) | 0xfL;

unsigned long s3c_irqwake_intmask	= 0xffffffffL;

unsigned long s3c_irqwake_eintallow	= 0x0000fff0L;

unsigned long s3c_irqwake_eintmask	= 0xffffffffL;



int

s3c_irq_wake(unsigned int irqno, unsigned int state)

{

	unsigned long irqbit = 1 << (irqno - IRQ_EINT0);



	if (!(s3c_irqwake_intallow & irqbit))

		return -ENOENT;



	printk(KERN_INFO "wake %s for irq %d\n",

	       state ? "enabled" : "disabled", irqno);



	if (!state)

		s3c_irqwake_intmask |= irqbit;

	else

		s3c_irqwake_intmask &= ~irqbit;



	return 0;

}



static int

s3c_irqext_wake(unsigned int irqno, unsigned int state)

{

	unsigned long bit = 1L << (irqno - EXTINT_OFF);



	if (!(s3c_irqwake_eintallow & bit))

		return -ENOENT;



	printk(KERN_INFO "wake %s for irq %d\n",

	       state ? "enabled" : "disabled", irqno);



	if (!state)

		s3c_irqwake_eintmask |= bit;

	else

		s3c_irqwake_eintmask &= ~bit;



	return 0;

}



#else

#define s3c_irqext_wake NULL

#define s3c_irq_wake NULL

#endif





static void

s3c_irq_mask(unsigned int irqno)

{
@@ -590,59 +525,6 @@ s3c_irq_demux_extint4t7(unsigned int irq, 
	}

}



#ifdef CONFIG_PM



static struct sleep_save irq_save[] = {

	SAVE_ITEM(S3C2410_INTMSK),

	SAVE_ITEM(S3C2410_INTSUBMSK),

};



/* the extint values move between the s3c2410/s3c2440 and the s3c2412

 * so we use an array to hold them, and to calculate the address of

 * the register at run-time

*/



static unsigned long save_extint[3];

static unsigned long save_eintflt[4];

static unsigned long save_eintmask;



int s3c24xx_irq_suspend(struct sys_device *dev, pm_message_t state)

{

	unsigned int i;



	for (i = 0; i < ARRAY_SIZE(save_extint); i++)

		save_extint[i] = __raw_readl(S3C24XX_EXTINT0 + (i*4));



	for (i = 0; i < ARRAY_SIZE(save_eintflt); i++)

		save_eintflt[i] = __raw_readl(S3C24XX_EINFLT0 + (i*4));



	s3c_pm_do_save(irq_save, ARRAY_SIZE(irq_save));

	save_eintmask = __raw_readl(S3C24XX_EINTMASK);



	return 0;

}



int s3c24xx_irq_resume(struct sys_device *dev)

{

	unsigned int i;



	for (i = 0; i < ARRAY_SIZE(save_extint); i++)

		__raw_writel(save_extint[i], S3C24XX_EXTINT0 + (i*4));



	for (i = 0; i < ARRAY_SIZE(save_eintflt); i++)

		__raw_writel(save_eintflt[i], S3C24XX_EINFLT0 + (i*4));



	s3c_pm_do_restore(irq_save, ARRAY_SIZE(irq_save));

	__raw_writel(save_eintmask, S3C24XX_EINTMASK);



	return 0;

}



#else

#define s3c24xx_irq_suspend NULL

#define s3c24xx_irq_resume  NULL

#endif



/* s3c24xx_init_irq

 *

 * Initialise S3C2410 IRQ system