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Commit 65983bd6 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge branch 'for-airlied' of git://people.freedesktop.org/~danvet/drm-intel into drm-next 

Daniel writes:
"New stuff for -next. Highlights:
- prep patches for the modeset rework. Note that one of those patches
  touches the fb helper in the common drm code.
- hasw hdmi audio support (Wang Xingchao)
- improved instdone dumping for gen7 (Ben)
- unbound tracking and a few follow-up patches from Chris
- dma_buf->begin/end_cpu_access plus fix for drm/udl (Dave)
- improve mmio error reporting for hsw
- prep patch for WQ_NON_REENTRANT removal (Tejun Heo)
"

* 'for-airlied' of git://people.freedesktop.org/~danvet/drm-intel: (41 commits)
  drm/i915: Remove __GFP_NO_KSWAPD
  drm/i915: disable rc6 on ilk when vt-d is enabled
  drm/i915: Avoid unbinding due to an interrupted pin_and_fence during execbuffer
  drm/i915: Use new INSTDONE registers (Gen7+)
  drm/i915: Add new INSTDONE registers
  drm/i915: Extract reading INSTDONE
  drm/i915: Use a non-blocking wait for set-to-domain ioctl
  drm/i915: Juggle code order to ease flow of the next patch
  drm/i915: Use cpu relocations if the object is in the GTT but not mappable
  drm/i915: Extract general object init routine
  drm/i915: Protect private gem objects from truncate (such as imported dmabuf)
  drm/i915: Only pwrite through the GTT if there is space in the aperture
  i915: use alloc_ordered_workqueue() instead of explicit UNBOUND w/ max_active = 1
  drm/i915: Find unclaimed MMIO writes.
  drm/i915: Add ERR_INT to gen7 error state
  drm/i915: Cantiga+ cannot handle a hsync front porch of 0
  drm/i915: fix reassignment of variable "intel_dp->DP"
  drm/i915: Try harder to allocate an mmap_offset
  drm/i915: Show pin count in debugfs
  drm/i915: Show (count, size) of purgeable objects in i915_gem_objects
  ...
parents 93bb70e0 d7c3b937

drivers/gpu/drm/drm_fb_helper.c

+0 −6
Original line number Diff line number Diff line
@@ -1230,7 +1230,6 @@ static void drm_setup_crtcs(struct drm_fb_helper *fb_helper) 
	struct drm_device *dev = fb_helper->dev;

	struct drm_fb_helper_crtc **crtcs;

	struct drm_display_mode **modes;

	struct drm_encoder *encoder;

	struct drm_mode_set *modeset;

	bool *enabled;

	int width, height;
@@ -1241,11 +1240,6 @@ static void drm_setup_crtcs(struct drm_fb_helper *fb_helper) 
	width = dev->mode_config.max_width;

	height = dev->mode_config.max_height;



	/* clean out all the encoder/crtc combos */

	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {

		encoder->crtc = NULL;

	}



	crtcs = kcalloc(dev->mode_config.num_connector,

			sizeof(struct drm_fb_helper_crtc *), GFP_KERNEL);

	modes = kcalloc(dev->mode_config.num_connector,

drivers/gpu/drm/i915/dvo.h

+4 −5
Original line number Diff line number Diff line
@@ -58,13 +58,12 @@ struct intel_dvo_dev_ops { 
	void (*create_resources)(struct intel_dvo_device *dvo);



	/*

	 * Turn on/off output or set intermediate power levels if available.

	 * Turn on/off output.

	 *

	 * Unsupported intermediate modes drop to the lower power setting.

	 * If the  mode is DPMSModeOff, the output must be disabled,

	 * as the DPLL may be disabled afterwards.

	 * Because none of our dvo drivers support an intermediate power levels,

	 * we don't expose this in the interfac.

	 */

	void (*dpms)(struct intel_dvo_device *dvo, int mode);

	void (*dpms)(struct intel_dvo_device *dvo, bool enable);



	/*

	 * Callback for testing a video mode for a given output.

drivers/gpu/drm/i915/dvo_ch7017.c

+4 −4
Original line number Diff line number Diff line
@@ -163,7 +163,7 @@ struct ch7017_priv { 
};



static void ch7017_dump_regs(struct intel_dvo_device *dvo);

static void ch7017_dpms(struct intel_dvo_device *dvo, int mode);

static void ch7017_dpms(struct intel_dvo_device *dvo, bool enable);



static bool ch7017_read(struct intel_dvo_device *dvo, u8 addr, u8 *val)

{
@@ -309,7 +309,7 @@ static void ch7017_mode_set(struct intel_dvo_device *dvo, 
	lvds_power_down = CH7017_LVDS_POWER_DOWN_DEFAULT_RESERVED |

			  (mode->hdisplay & 0x0700) >> 8;



	ch7017_dpms(dvo, DRM_MODE_DPMS_OFF);

	ch7017_dpms(dvo, false);

	ch7017_write(dvo, CH7017_HORIZONTAL_ACTIVE_PIXEL_INPUT,

			horizontal_active_pixel_input);

	ch7017_write(dvo, CH7017_HORIZONTAL_ACTIVE_PIXEL_OUTPUT,
@@ -331,7 +331,7 @@ static void ch7017_mode_set(struct intel_dvo_device *dvo, 
}



/* set the CH7017 power state */

static void ch7017_dpms(struct intel_dvo_device *dvo, int mode)

static void ch7017_dpms(struct intel_dvo_device *dvo, bool enable)

{

	uint8_t val;
@@ -345,7 +345,7 @@ static void ch7017_dpms(struct intel_dvo_device *dvo, int mode) 
			CH7017_DAC3_POWER_DOWN |

			CH7017_TV_POWER_DOWN_EN);



	if (mode == DRM_MODE_DPMS_ON) {

	if (enable) {

		/* Turn on the LVDS */

		ch7017_write(dvo, CH7017_LVDS_POWER_DOWN,

			     val & ~CH7017_LVDS_POWER_DOWN_EN);

drivers/gpu/drm/i915/dvo_ch7xxx.c

+2 −2
Original line number Diff line number Diff line
@@ -289,9 +289,9 @@ static void ch7xxx_mode_set(struct intel_dvo_device *dvo, 
}



/* set the CH7xxx power state */

static void ch7xxx_dpms(struct intel_dvo_device *dvo, int mode)

static void ch7xxx_dpms(struct intel_dvo_device *dvo, bool enable)

{

	if (mode == DRM_MODE_DPMS_ON)

	if (enable)

		ch7xxx_writeb(dvo, CH7xxx_PM, CH7xxx_PM_DVIL | CH7xxx_PM_DVIP);

	else

		ch7xxx_writeb(dvo, CH7xxx_PM, CH7xxx_PM_FPD);

drivers/gpu/drm/i915/dvo_ivch.c

+4 −4
Original line number Diff line number Diff line
@@ -288,7 +288,7 @@ static enum drm_mode_status ivch_mode_valid(struct intel_dvo_device *dvo, 
}



/** Sets the power state of the panel connected to the ivch */

static void ivch_dpms(struct intel_dvo_device *dvo, int mode)

static void ivch_dpms(struct intel_dvo_device *dvo, bool enable)

{

	int i;

	uint16_t vr01, vr30, backlight;
@@ -297,13 +297,13 @@ static void ivch_dpms(struct intel_dvo_device *dvo, int mode) 
	if (!ivch_read(dvo, VR01, &vr01))

		return;



	if (mode == DRM_MODE_DPMS_ON)

	if (enable)

		backlight = 1;

	else

		backlight = 0;

	ivch_write(dvo, VR80, backlight);



	if (mode == DRM_MODE_DPMS_ON)

	if (enable)

		vr01 |= VR01_LCD_ENABLE | VR01_DVO_ENABLE;

	else

		vr01 &= ~(VR01_LCD_ENABLE | VR01_DVO_ENABLE);
@@ -315,7 +315,7 @@ static void ivch_dpms(struct intel_dvo_device *dvo, int mode) 
		if (!ivch_read(dvo, VR30, &vr30))

			break;



		if (((vr30 & VR30_PANEL_ON) != 0) == (mode == DRM_MODE_DPMS_ON))

		if (((vr30 & VR30_PANEL_ON) != 0) == enable)

			break;

		udelay(1000);

	}