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Commit 658b32ca authored by Colin Ngam's avatar Colin Ngam Committed by Tony Luck
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[IA64-SGI] support variable length nasids in shub2 



This patch enables our TIO IO chipset to support variable length nasids in 
Shub2 chipset.

Signed-off-by: default avatarColin Ngam <cngam@sgi.com>
Signed-off-by: default avatarTony Luck <tony.luck@intel.com>
parent be539c73

include/asm-ia64/sn/addrs.h

+2 −1
Original line number Diff line number Diff line
@@ -154,8 +154,9 @@ 
 *           the chiplet id is zero.  If we implement TIO-TIO dma, we might need

 *           to insert a chiplet id into this macro.  However, it is our belief

 *           right now that this chiplet id will be ICE, which is also zero.

 *           Nasid starts on bit 40.

 */

#define PHYS_TO_TIODMA(x)	( (((u64)(x) & NASID_MASK) << 2) | NODE_OFFSET(x))

#define PHYS_TO_TIODMA(x)	( (((u64)(NASID_GET(x))) << 40) | NODE_OFFSET(x))

#define PHYS_TO_DMA(x)          ( (((u64)(x) & NASID_MASK) >> 2) | NODE_OFFSET(x))