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Commit 65734a26 authored by Tomi Valkeinen's avatar Tomi Valkeinen Committed by Jyri Sarha
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drm/tilcdc: cleanup runtime PM handling 



Cleanup runtime PM handling. Before the patch the usage of pm_runtime
calls was inconsistent and hard to follow. After the update the
pm_runtime calls are removed from set_scanout() and called around
major operations that access the HW. After the patch the DPMS code does
not have pm_runtime_forbid/allow calls any more and
pm_runtime_irq_safe() is not set anymore.

Signed-off-by: default avatarTomi Valkeinen <tomi.valkeinen@ti.com>
[Added description to the patch]
Signed-off-by: default avatarJyri Sarha <jsarha@ti.com>
parent 29ddd6e1

drivers/gpu/drm/tilcdc/tilcdc_crtc.c

+11 −8
Original line number Original line Diff line number Diff line
@@ -71,7 +71,6 @@ static void set_scanout(struct drm_crtc *crtc, int n) 
	struct drm_device *dev = crtc->dev;

	struct drm_device *dev = crtc->dev;

	struct tilcdc_drm_private *priv = dev->dev_private;

	struct tilcdc_drm_private *priv = dev->dev_private;





	pm_runtime_get_sync(dev->dev);

	tilcdc_write(dev, base_reg[n], tilcdc_crtc->start);

	tilcdc_write(dev, base_reg[n], tilcdc_crtc->start);

	tilcdc_write(dev, ceil_reg[n], tilcdc_crtc->end);

	tilcdc_write(dev, ceil_reg[n], tilcdc_crtc->end);

	if (tilcdc_crtc->scanout[n]) {

	if (tilcdc_crtc->scanout[n]) {
@@ -81,7 +80,6 @@ static void set_scanout(struct drm_crtc *crtc, int n) 
	tilcdc_crtc->scanout[n] = crtc->primary->fb;

	tilcdc_crtc->scanout[n] = crtc->primary->fb;

	drm_framebuffer_reference(tilcdc_crtc->scanout[n]);

	drm_framebuffer_reference(tilcdc_crtc->scanout[n]);

	tilcdc_crtc->dirty &= ~stat[n];

	tilcdc_crtc->dirty &= ~stat[n];

	pm_runtime_put_sync(dev->dev);

}

}





static void update_scanout(struct drm_crtc *crtc)

static void update_scanout(struct drm_crtc *crtc)
@@ -186,8 +184,13 @@ static int tilcdc_crtc_page_flip(struct drm_crtc *crtc, 




	crtc->primary->fb = fb;

	crtc->primary->fb = fb;

	tilcdc_crtc->event = event;

	tilcdc_crtc->event = event;



	pm_runtime_get_sync(dev->dev);



	update_scanout(crtc);

	update_scanout(crtc);





	pm_runtime_put_sync(dev->dev);



	return 0;

	return 0;

}

}
@@ -206,10 +209,8 @@ void tilcdc_crtc_dpms(struct drm_crtc *crtc, int mode) 




	tilcdc_crtc->dpms = mode;

	tilcdc_crtc->dpms = mode;





	pm_runtime_get_sync(dev->dev);



	if (mode == DRM_MODE_DPMS_ON) {

	if (mode == DRM_MODE_DPMS_ON) {

		pm_runtime_forbid(dev->dev);

		pm_runtime_get_sync(dev->dev);

		start(crtc);

		start(crtc);

	} else {

	} else {

		tilcdc_crtc->frame_done = false;

		tilcdc_crtc->frame_done = false;
@@ -227,11 +228,10 @@ void tilcdc_crtc_dpms(struct drm_crtc *crtc, int mode) 
			if (ret == 0)

			if (ret == 0)

				dev_err(dev->dev, "timeout waiting for framedone\n");

				dev_err(dev->dev, "timeout waiting for framedone\n");

		}

		}

		pm_runtime_allow(dev->dev);

	}





		pm_runtime_put_sync(dev->dev);

		pm_runtime_put_sync(dev->dev);

	}

	}

}





static bool tilcdc_crtc_mode_fixup(struct drm_crtc *crtc,

static bool tilcdc_crtc_mode_fixup(struct drm_crtc *crtc,

		const struct drm_display_mode *mode,

		const struct drm_display_mode *mode,
@@ -455,13 +455,16 @@ static int tilcdc_crtc_mode_set(struct drm_crtc *crtc, 
static int tilcdc_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,

static int tilcdc_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,

		struct drm_framebuffer *old_fb)

		struct drm_framebuffer *old_fb)

{

{

	struct drm_device *dev = crtc->dev;

	int r;

	int r;





	r = tilcdc_verify_fb(crtc, crtc->primary->fb);

	r = tilcdc_verify_fb(crtc, crtc->primary->fb);

	if (r)

	if (r)

		return r;

		return r;





	pm_runtime_get_sync(dev->dev);

	update_scanout(crtc);

	update_scanout(crtc);

	pm_runtime_put_sync(dev->dev);

	return 0;

	return 0;

}

}

drivers/gpu/drm/tilcdc/tilcdc_drv.c

+0 −1
Original line number Original line Diff line number Diff line
@@ -230,7 +230,6 @@ static int tilcdc_load(struct drm_device *dev, unsigned long flags) 
	DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);

	DBG("Maximum Pixel Clock Value %dKHz", priv->max_pixelclock);





	pm_runtime_enable(dev->dev);

	pm_runtime_enable(dev->dev);

	pm_runtime_irq_safe(dev->dev);





	/* Determine LCD IP Version */

	/* Determine LCD IP Version */

	pm_runtime_get_sync(dev->dev);

	pm_runtime_get_sync(dev->dev);