Commit 652847aa authored Jan 20, 2012 by Andreas Herrmann Committed by Ingo Molnar Jan 26, 2012

x86/amd: Add missing feature flag for fam15h models 10h-1fh processors



That is the last one missing for those CPUs.

Others were recently added with commits

 fb215366
 (KVM: expose latest Intel cpu new features (BMI1/BMI2/FMA/AVX2) to guest)

and

 commit 969df4b8
 (x86: Report cpb and eff_freq_ro flags correctly)

Signed-off-by: Andreas Herrmann <andreas.herrmann3@amd.com>
Link: http://lkml.kernel.org/r/20120120163823.GC24508@alberich.amd.com


Signed-off-by: Ingo Molnar <mingo@elte.hu>

parent 5067cf53

arch/x86/include/asm/cpufeature.h

+1 −0

Original line number	Diff line number	Diff line
		@@ -159,6 +159,7 @@
		#define X86_FEATURE_WDT (632+13) / Watchdog timer */
		#define X86_FEATURE_LWP (632+15) / Light Weight Profiling */
		#define X86_FEATURE_FMA4 (632+16) / 4 operands MAC instructions */
		#define X86_FEATURE_TCE (632+17) / translation cache extension */
		#define X86_FEATURE_NODEID_MSR (632+19) / NodeId MSR */
		#define X86_FEATURE_TBM (632+21) / trailing bit manipulations */
		#define X86_FEATURE_TOPOEXT (632+22) / topology extensions CPUID leafs */

Original line number	Diff line number	Diff line
		@@ -159,6 +159,7 @@
		#define X86_FEATURE_WDT (632+13) / Watchdog timer */
		#define X86_FEATURE_LWP (632+15) / Light Weight Profiling */
		#define X86_FEATURE_FMA4 (632+16) / 4 operands MAC instructions */
		#define X86_FEATURE_TCE (632+17) / translation cache extension */
		#define X86_FEATURE_NODEID_MSR (632+19) / NodeId MSR */
		#define X86_FEATURE_TBM (632+21) / trailing bit manipulations */
		#define X86_FEATURE_TOPOEXT (632+22) / topology extensions CPUID leafs */