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Commit 63aa211c authored by Marco Felsch's avatar Marco Felsch Committed by Greg Kroah-Hartman
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ARM: dts: pfla02: increase phy reset duration 



[ Upstream commit 032f85c9360fb1a08385c584c2c4ed114b33c260 ]

Increase the reset duration to ensure correct phy functionality. The
reset duration is taken from barebox commit 52fdd510de ("ARM: dts:
pfla02: use long enough reset for ethernet phy"):

  Use a longer reset time for ethernet phy Micrel KSZ9031RNX. Otherwise a
  small percentage of modules have 'transmission timeouts' errors like

  barebox@Phytec phyFLEX-i.MX6 Quad Carrier-Board:/ ifup eth0
  warning: No MAC address set. Using random address 7e:94:4d:02:f8:f3
  eth0: 1000Mbps full duplex link detected
  eth0: transmission timeout
  T eth0: transmission timeout
  T eth0: transmission timeout
  T eth0: transmission timeout
  T eth0: transmission timeout

Cc: Stefan Christ <s.christ@phytec.de>
Cc: Christian Hemp <c.hemp@phytec.de>
Signed-off-by: default avatarMarco Felsch <m.felsch@pengutronix.de>
Fixes: 3180f956 ("ARM: dts: Phytec imx6q pfla02 and pbab01 support")
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
Signed-off-by: default avatarSasha Levin (Microsoft) <sashal@kernel.org>
parent 3cd83b59

arch/arm/boot/dts/imx6qdl-phytec-pfla02.dtsi

+1 −0
Original line number Diff line number Diff line
@@ -90,6 +90,7 @@ 
	pinctrl-names = "default";

	pinctrl-0 = <&pinctrl_enet>;

	phy-mode = "rgmii";

	phy-reset-duration = <10>; /* in msecs */

	phy-reset-gpios = <&gpio3 23 GPIO_ACTIVE_LOW>;

	phy-supply = <&vdd_eth_io_reg>;

	status = "disabled";