Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 6381b550 authored by Nick Hoath's avatar Nick Hoath Committed by Daniel Vetter
Browse files

drm/i915/gen9: Implement WaDisableKillLogic for gen 9 



v2: Patch leakage fixed

Signed-off-by: default avatarNick Hoath <nicholas.hoath@intel.com>
Reviewed-by: default avatarMika Kuoppala <mika.kuoppala@intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 346add78

drivers/gpu/drm/i915/i915_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -160,6 +160,7 @@ 
#define GAM_ECOCHK			0x4090

#define   BDW_DISABLE_HDC_INVALIDATION	(1<<25)

#define   ECOCHK_SNB_BIT		(1<<10)

#define   ECOCHK_DIS_TLB		(1<<8)

#define   HSW_ECOCHK_ARB_PRIO_SOL	(1<<6)

#define   ECOCHK_PPGTT_CACHE64B		(0x3<<3)

#define   ECOCHK_PPGTT_CACHE4B		(0x0<<3)

drivers/gpu/drm/i915/intel_pm.c

+4 −0
Original line number Diff line number Diff line
@@ -59,6 +59,10 @@ static void gen9_init_clock_gating(struct drm_device *dev) 
	/* WaEnableLbsSlaRetryTimerDecrement:skl */

	I915_WRITE(BDW_SCRATCH1, I915_READ(BDW_SCRATCH1) |

		   GEN9_LBS_SLA_RETRY_TIMER_DECREMENT_ENABLE);



	/* WaDisableKillLogic:bxt,skl */

	I915_WRITE(GAM_ECOCHK, I915_READ(GAM_ECOCHK) |

		   ECOCHK_DIS_TLB);

}



static void skl_init_clock_gating(struct drm_device *dev)