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Commit 6300d6d7 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6 

* 'drm-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/airlied/drm-2.6:
  drm: Do not force 1024x768 modes on unknown connectors
  drm/kms: Add a module parameter to disable polling
  drm/radeon/kms: fix tv-out on avivo asics
  drm/radeon/kms/evergreen: fix gpu hangs in userspace accel code
  drm/nv50: initialize ramht_refs list for faked 0 channel
  drm/nouveau: Don't take struct_mutex around the pushbuf IOCTL.
  drm/nouveau: Take fence spinlock before reading the last sequence.
  drm/radeon/kms/evergreen: work around bad data in some i2c tables
  drm/radeon/kms: properly set crtc high base on r7xx
  drm/radeon/kms: fix tv module parameter
  drm/radeon/kms: force legacy pll algo for RV515 LVDS
  drm/radeon/kms: remove useless clock code
  drm/radeon/kms: fix a regression on r7xx AGP due to the HDP flush fix
  drm/radeon/kms: use tracked values for sclk and mclk
parents e6ba59bc c7ef35a9

drivers/gpu/drm/drm_crtc_helper.c

+18 −6
Original line number Diff line number Diff line
@@ -34,6 +34,9 @@ 
#include "drm_crtc_helper.h"

#include "drm_fb_helper.h"



static bool drm_kms_helper_poll = true;

module_param_named(poll, drm_kms_helper_poll, bool, 0600);



static void drm_mode_validate_flag(struct drm_connector *connector,

				   int flags)

{
@@ -99,8 +102,10 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector, 
			connector->status = connector_status_disconnected;

		if (connector->funcs->force)

			connector->funcs->force(connector);

	} else

	} else {

		connector->status = connector->funcs->detect(connector);

		drm_helper_hpd_irq_event(dev);

	}



	if (connector->status == connector_status_disconnected) {

		DRM_DEBUG_KMS("[CONNECTOR:%d:%s] disconnected\n",
@@ -110,11 +115,10 @@ int drm_helper_probe_single_connector_modes(struct drm_connector *connector, 
	}



	count = (*connector_funcs->get_modes)(connector);

	if (!count) {

	if (count == 0 && connector->status == connector_status_connected)

		count = drm_add_modes_noedid(connector, 1024, 768);

		if (!count)

			return 0;

	}

	if (count == 0)

		goto prune;



	drm_mode_connector_list_update(connector);
@@ -840,6 +844,9 @@ static void output_poll_execute(struct work_struct *work) 
	enum drm_connector_status old_status, status;

	bool repoll = false, changed = false;



	if (!drm_kms_helper_poll)

		return;



	mutex_lock(&dev->mode_config.mutex);

	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {
@@ -890,6 +897,9 @@ void drm_kms_helper_poll_enable(struct drm_device *dev) 
	bool poll = false;

	struct drm_connector *connector;



	if (!dev->mode_config.poll_enabled || !drm_kms_helper_poll)

		return;



	list_for_each_entry(connector, &dev->mode_config.connector_list, head) {

		if (connector->polled)

			poll = true;
@@ -919,8 +929,10 @@ void drm_helper_hpd_irq_event(struct drm_device *dev) 
{

	if (!dev->mode_config.poll_enabled)

		return;



	/* kill timer and schedule immediate execution, this doesn't block */

	cancel_delayed_work(&dev->mode_config.output_poll_work);

	if (drm_kms_helper_poll)

		queue_delayed_work(system_nrt_wq, &dev->mode_config.output_poll_work, 0);

}

EXPORT_SYMBOL(drm_helper_hpd_irq_event);

drivers/gpu/drm/nouveau/nouveau_fence.c

+4 −2
Original line number Diff line number Diff line
@@ -64,16 +64,17 @@ nouveau_fence_update(struct nouveau_channel *chan) 
	struct nouveau_fence *fence;

	uint32_t sequence;



	spin_lock(&chan->fence.lock);



	if (USE_REFCNT)

		sequence = nvchan_rd32(chan, 0x48);

	else

		sequence = atomic_read(&chan->fence.last_sequence_irq);



	if (chan->fence.sequence_ack == sequence)

		return;

		goto out;

	chan->fence.sequence_ack = sequence;



	spin_lock(&chan->fence.lock);

	list_for_each_safe(entry, tmp, &chan->fence.pending) {

		fence = list_entry(entry, struct nouveau_fence, entry);
@@ -85,6 +86,7 @@ nouveau_fence_update(struct nouveau_channel *chan) 
		if (sequence == chan->fence.sequence_ack)

			break;

	}

out:

	spin_unlock(&chan->fence.lock);

}

drivers/gpu/drm/nouveau/nouveau_gem.c

+2 −5
Original line number Diff line number Diff line
@@ -245,7 +245,7 @@ validate_fini_list(struct list_head *list, struct nouveau_fence *fence) 
		list_del(&nvbo->entry);

		nvbo->reserved_by = NULL;

		ttm_bo_unreserve(&nvbo->bo);

		drm_gem_object_unreference(nvbo->gem);

		drm_gem_object_unreference_unlocked(nvbo->gem);

	}

}
@@ -300,7 +300,7 @@ validate_init(struct nouveau_channel *chan, struct drm_file *file_priv, 
			validate_fini(op, NULL);

			if (ret == -EAGAIN)

				ret = ttm_bo_wait_unreserved(&nvbo->bo, false);

			drm_gem_object_unreference(gem);

			drm_gem_object_unreference_unlocked(gem);

			if (ret) {

				NV_ERROR(dev, "fail reserve\n");

				return ret;
@@ -616,8 +616,6 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data, 
		return PTR_ERR(bo);

	}



	mutex_lock(&dev->struct_mutex);



	/* Mark push buffers as being used on PFIFO, the validation code

	 * will then make sure that if the pushbuf bo moves, that they

	 * happen on the kernel channel, which will in turn cause a sync
@@ -731,7 +729,6 @@ nouveau_gem_ioctl_pushbuf(struct drm_device *dev, void *data, 
out:

	validate_fini(&op, fence);

	nouveau_fence_unref((void**)&fence);

	mutex_unlock(&dev->struct_mutex);

	kfree(bo);

	kfree(push);

drivers/gpu/drm/nouveau/nv50_instmem.c

+2 −0
Original line number Diff line number Diff line
@@ -139,6 +139,8 @@ nv50_instmem_init(struct drm_device *dev) 
	chan->file_priv = (struct drm_file *)-2;

	dev_priv->fifos[0] = dev_priv->fifos[127] = chan;



	INIT_LIST_HEAD(&chan->ramht_refs);



	/* Channel's PRAMIN object + heap */

	ret = nouveau_gpuobj_new_fake(dev, 0, c_offset, c_size, 0,

							NULL, &chan->ramin);

drivers/gpu/drm/radeon/atombios_crtc.c

+41 −7
Original line number Diff line number Diff line
@@ -332,6 +332,11 @@ static void atombios_crtc_set_timing(struct drm_crtc *crtc, 
	args.usV_SyncWidth =

		cpu_to_le16(mode->crtc_vsync_end - mode->crtc_vsync_start);



	args.ucOverscanRight = radeon_crtc->h_border;

	args.ucOverscanLeft = radeon_crtc->h_border;

	args.ucOverscanBottom = radeon_crtc->v_border;

	args.ucOverscanTop = radeon_crtc->v_border;



	if (mode->flags & DRM_MODE_FLAG_NVSYNC)

		misc |= ATOM_VSYNC_POLARITY;

	if (mode->flags & DRM_MODE_FLAG_NHSYNC)
@@ -534,6 +539,20 @@ static u32 atombios_adjust_pll(struct drm_crtc *crtc, 
					pll->algo = PLL_ALGO_LEGACY;

					pll->flags |= RADEON_PLL_PREFER_CLOSEST_LOWER;

				}

				/* There is some evidence (often anecdotal) that RV515 LVDS

				 * (on some boards at least) prefers the legacy algo.  I'm not

				 * sure whether this should handled generically or on a

				 * case-by-case quirk basis.  Both algos should work fine in the

				 * majority of cases.

				 */

				if ((radeon_encoder->active_device & (ATOM_DEVICE_LCD_SUPPORT)) &&

				    (rdev->family == CHIP_RV515)) {

					/* allow the user to overrride just in case */

					if (radeon_new_pll == 1)

						pll->algo = PLL_ALGO_NEW;

					else

						pll->algo = PLL_ALGO_LEGACY;

				}

			} else {

				if (encoder->encoder_type != DRM_MODE_ENCODER_DAC)

					pll->flags |= RADEON_PLL_NO_ODD_POST_DIV;
@@ -1056,11 +1075,11 @@ static int avivo_crtc_set_base(struct drm_crtc *crtc, int x, int y, 


	if (rdev->family >= CHIP_RV770) {

		if (radeon_crtc->crtc_id) {

			WREG32(R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, 0);

			WREG32(R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, 0);

			WREG32(R700_D2GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(fb_location));

			WREG32(R700_D2GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(fb_location));

		} else {

			WREG32(R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, 0);

			WREG32(R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, 0);

			WREG32(R700_D1GRPH_PRIMARY_SURFACE_ADDRESS_HIGH, upper_32_bits(fb_location));

			WREG32(R700_D1GRPH_SECONDARY_SURFACE_ADDRESS_HIGH, upper_32_bits(fb_location));

		}

	}

	WREG32(AVIVO_D1GRPH_PRIMARY_SURFACE_ADDRESS + radeon_crtc->crtc_offset,
@@ -1197,8 +1216,18 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc, 
	struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);

	struct drm_device *dev = crtc->dev;

	struct radeon_device *rdev = dev->dev_private;

	struct drm_encoder *encoder;

	bool is_tvcv = false;



	/* TODO color tiling */

	list_for_each_entry(encoder, &dev->mode_config.encoder_list, head) {

		/* find tv std */

		if (encoder->crtc == crtc) {

			struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);

			if (radeon_encoder->active_device &

			    (ATOM_DEVICE_TV_SUPPORT | ATOM_DEVICE_CV_SUPPORT))

				is_tvcv = true;

		}

	}



	atombios_disable_ss(crtc);

	/* always set DCPLL */
@@ -1207,9 +1236,14 @@ int atombios_crtc_mode_set(struct drm_crtc *crtc, 
	atombios_crtc_set_pll(crtc, adjusted_mode);

	atombios_enable_ss(crtc);



	if (ASIC_IS_AVIVO(rdev))

	if (ASIC_IS_DCE4(rdev))

		atombios_set_crtc_dtd_timing(crtc, adjusted_mode);

	else {

	else if (ASIC_IS_AVIVO(rdev)) {

		if (is_tvcv)

			atombios_crtc_set_timing(crtc, adjusted_mode);

		else

			atombios_set_crtc_dtd_timing(crtc, adjusted_mode);

	} else {

		atombios_crtc_set_timing(crtc, adjusted_mode);

		if (radeon_crtc->crtc_id == 0)

			atombios_set_crtc_dtd_timing(crtc, adjusted_mode);