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Commit 622147fd authored by Daniel Vetter's avatar Daniel Vetter
Browse files

Merge tag 'drm-intel-fixes-2015-08-14' into drm-intel-next-fixes 



Backmerge drm-intel-fixes because a bunch of atomic patch backporting
we had to do lead to horrible conflicts.

Conflicts:
	drivers/gpu/drm/drm_crtc.c
Just a bit of context conflict between -next and -fixes.
	drivers/gpu/drm/i915/intel_atomic.c
	drivers/gpu/drm/i915/intel_display.c
Atomic conflicts, always pick the code from -next.

Signed-off-by: default avatarDaniel Vetter <daniel.vetter@intel.com>
parents 5a2376d1 d2944cf2

Documentation/devicetree/bindings/dma/apm-xgene-dma.txt

+1 −1
Original line number Diff line number Diff line
@@ -35,7 +35,7 @@ Example: 
			device_type = "dma";

			reg = <0x0 0x1f270000 0x0 0x10000>,

			      <0x0 0x1f200000 0x0 0x10000>,

			      <0x0 0x1b008000 0x0 0x2000>,

			      <0x0 0x1b000000 0x0 0x400000>,

			      <0x0 0x1054a000 0x0 0x100>;

			interrupts = <0x0 0x82 0x4>,

				     <0x0 0xb8 0x4>,

Documentation/devicetree/bindings/iommu/arm,smmu-v3.txt

+3 −0
Original line number Diff line number Diff line
@@ -35,3 +35,6 @@ the PCIe specification. 


                      NOTE: this only applies to the SMMU itself, not

                      masters connected upstream of the SMMU.



- hisilicon,broken-prefetch-cmd

                    : Avoid sending CMD_PREFETCH_* commands to the SMMU.

Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.txt

+0 −2
Original line number Diff line number Diff line
@@ -17,7 +17,6 @@ Required properties: 
	       "fsl,imx6sx-usdhc"



Optional properties:

- fsl,cd-controller : Indicate to use controller internal card detection

- fsl,wp-controller : Indicate to use controller internal write protection

- fsl,delay-line : Specify the number of delay cells for override mode.

  This is used to set the clock delay for DLL(Delay Line) on override mode
@@ -35,7 +34,6 @@ esdhc@70004000 { 
	compatible = "fsl,imx51-esdhc";

	reg = <0x70004000 0x4000>;

	interrupts = <1>;

	fsl,cd-controller;

	fsl,wp-controller;

};

Documentation/devicetree/bindings/phy/ti-phy.txt

+16 −0
Original line number Diff line number Diff line
@@ -82,6 +82,9 @@ Optional properties: 
 - id: If there are multiple instance of the same type, in order to

   differentiate between each instance "id" can be used (e.g., multi-lane PCIe

   PHY). If "id" is not provided, it is set to default value of '1'.

 - syscon-pllreset: Handle to system control region that contains the

   CTRL_CORE_SMA_SW_0 register and register offset to the CTRL_CORE_SMA_SW_0

   register that contains the SATA_PLL_SOFT_RESET bit. Only valid for sata_phy.



This is usually a subnode of ocp2scp to which it is connected.
@@ -100,3 +103,16 @@ usb3phy@4a084400 { 
			"sysclk",

			"refclk";

};



sata_phy: phy@4A096000 {

	compatible = "ti,phy-pipe3-sata";

	reg = <0x4A096000 0x80>, /* phy_rx */

	      <0x4A096400 0x64>, /* phy_tx */

	      <0x4A096800 0x40>; /* pll_ctrl */

	reg-names = "phy_rx", "phy_tx", "pll_ctrl";

	ctrl-module = <&omap_control_sata>;

	clocks = <&sys_clkin1>, <&sata_ref_clk>;

	clock-names = "sysclk", "refclk";

	syscon-pllreset = <&scm_conf 0x3fc>;

	#phy-cells = <0>;

};

Documentation/devicetree/bindings/sound/mt8173-max98090.txt

+2 −0
Original line number Diff line number Diff line
@@ -3,11 +3,13 @@ MT8173 with MAX98090 CODEC 
Required properties:

- compatible : "mediatek,mt8173-max98090"

- mediatek,audio-codec: the phandle of the MAX98090 audio codec

- mediatek,platform: the phandle of MT8173 ASoC platform



Example:



	sound {

		compatible = "mediatek,mt8173-max98090";

		mediatek,audio-codec = <&max98090>;

		mediatek,platform = <&afe>;

	};