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Commit 605b28c8 authored by Dave Airlie's avatar Dave Airlie
Browse files

Merge tag 'drm-intel-next-2016-04-11' of git://anongit.freedesktop.org/drm-intel into drm-next 

- make modeset hw state checker atomic aware (Maarten)
- close races in gpu stuck detection/seqno reading (Chris)
- tons&tons of small improvements from Chris Wilson all over the gem code
- more dsi/bxt work from Ramalingam&Jani
- macro polish from Joonas
- guc fw loading fixes (Arun&Dave)
- vmap notifier (acked by Andrew) + i915 support by Chris Wilson
- create bottom half for execlist irq processing (Chris Wilson)
- vlv/chv pll cleanup (Ville)
- rework DP detection, especially sink detection (Shubhangi Shrivastava)
- make color manager support fully atomic (Maarten)
- avoid livelock on chv in execlist irq handler (Chris)

* tag 'drm-intel-next-2016-04-11' of git://anongit.freedesktop.org/drm-intel: (82 commits)
  drm/i915: Update DRIVER_DATE to 20160411
  drm/i915: Avoid allocating a vmap arena for a single page
  drm,i915: Introduce drm_malloc_gfp()
  drm/i915/shrinker: Restrict vmap purge to objects with vmaps
  drm/i915: Refactor duplicate object vmap functions
  drm/i915: Consolidate common error handling in intel_pin_and_map_ringbuffer_obj
  drm/i915/dmabuf: Tighten struct_mutex for unmap_dma_buf
  drm/i915: implement WaClearTdlStateAckDirtyBits
  drm/i915/bxt: Reversed polarity of PORT_PLL_REF_SEL bit
  drm/i915: Rename hw state checker to hw state verifier.
  drm/i915: Move modeset state verifier calls.
  drm/i915: Make modeset state verifier take crtc as argument.
  drm/i915: Replace manual barrier() with READ_ONCE() in HWS accessor
  drm/i915: Use simplest form for flushing the single cacheline in the HWS
  drm/i915: Harden detection of missed interrupts
  drm/i915: Separate out the seqno-barrier from engine->get_seqno
  drm/i915: Remove forcewake dance from seqno/irq barrier on legacy gen6+
  drm/i915: Fixup the free space logic in ring_prepare
  drm/i915: Simplify check for idleness in hangcheck
  drm/i915: Apply a mb between emitting the request and hangcheck
  ...
parents 49047962 ba3150ac

drivers/gpu/drm/i915/i915_debugfs.c

+39 −27
Original line number Diff line number Diff line
@@ -134,6 +134,8 @@ describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj) 
	int pin_count = 0;

	enum intel_engine_id id;



	lockdep_assert_held(&obj->base.dev->struct_mutex);



	seq_printf(m, "%pK: %s%s%s%s %8zdKiB %02x %02x [ ",

		   &obj->base,

		   obj->active ? "*" : " ",
@@ -202,8 +204,8 @@ static int i915_gem_object_list_info(struct seq_file *m, void *data) 
	uintptr_t list = (uintptr_t) node->info_ent->data;

	struct list_head *head;

	struct drm_device *dev = node->minor->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct i915_address_space *vm = &dev_priv->ggtt.base;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct i915_ggtt *ggtt = &dev_priv->ggtt;

	struct i915_vma *vma;

	u64 total_obj_size, total_gtt_size;

	int count, ret;
@@ -216,11 +218,11 @@ static int i915_gem_object_list_info(struct seq_file *m, void *data) 
	switch (list) {

	case ACTIVE_LIST:

		seq_puts(m, "Active:\n");

		head = &vm->active_list;

		head = &ggtt->base.active_list;

		break;

	case INACTIVE_LIST:

		seq_puts(m, "Inactive:\n");

		head = &vm->inactive_list;

		head = &ggtt->base.inactive_list;

		break;

	default:

		mutex_unlock(&dev->struct_mutex);
@@ -429,11 +431,11 @@ static int i915_gem_object_info(struct seq_file *m, void* data) 
{

	struct drm_info_node *node = m->private;

	struct drm_device *dev = node->minor->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;

	struct drm_i915_private *dev_priv = to_i915(dev);

	struct i915_ggtt *ggtt = &dev_priv->ggtt;

	u32 count, mappable_count, purgeable_count;

	u64 size, mappable_size, purgeable_size;

	struct drm_i915_gem_object *obj;

	struct i915_address_space *vm = &dev_priv->ggtt.base;

	struct drm_file *file;

	struct i915_vma *vma;

	int ret;
@@ -452,12 +454,12 @@ static int i915_gem_object_info(struct seq_file *m, void* data) 
		   count, mappable_count, size, mappable_size);



	size = count = mappable_size = mappable_count = 0;

	count_vmas(&vm->active_list, vm_link);

	count_vmas(&ggtt->base.active_list, vm_link);

	seq_printf(m, "  %u [%u] active objects, %llu [%llu] bytes\n",

		   count, mappable_count, size, mappable_size);



	size = count = mappable_size = mappable_count = 0;

	count_vmas(&vm->inactive_list, vm_link);

	count_vmas(&ggtt->base.inactive_list, vm_link);

	seq_printf(m, "  %u [%u] inactive objects, %llu [%llu] bytes\n",

		   count, mappable_count, size, mappable_size);
@@ -492,8 +494,7 @@ static int i915_gem_object_info(struct seq_file *m, void* data) 
		   count, size);



	seq_printf(m, "%llu [%llu] gtt total\n",

		   dev_priv->ggtt.base.total,

		   (u64)dev_priv->ggtt.mappable_end - dev_priv->ggtt.base.start);

		   ggtt->base.total, ggtt->mappable_end - ggtt->base.start);



	seq_putc(m, '\n');

	print_batch_pool_stats(m, dev_priv);
@@ -597,7 +598,7 @@ static int i915_gem_pageflip_info(struct seq_file *m, void *data) 
					   engine->name,

					   i915_gem_request_get_seqno(work->flip_queued_req),

					   dev_priv->next_seqno,

					   engine->get_seqno(engine, true),

					   engine->get_seqno(engine),

					   i915_gem_request_completed(work->flip_queued_req, true));

			} else

				seq_printf(m, "Flip not associated with any ring\n");
@@ -727,10 +728,10 @@ static int i915_gem_request_info(struct seq_file *m, void *data) 
static void i915_ring_seqno_info(struct seq_file *m,

				 struct intel_engine_cs *engine)

{

	if (engine->get_seqno) {

	seq_printf(m, "Current sequence (%s): %x\n",

			   engine->name, engine->get_seqno(engine, false));

	}

		   engine->name, engine->get_seqno(engine));

	seq_printf(m, "Current user interrupts (%s): %x\n",

		   engine->name, READ_ONCE(engine->user_interrupts));

}



static int i915_gem_seqno_info(struct seq_file *m, void *data)
@@ -1345,8 +1346,8 @@ static int i915_hangcheck_info(struct seq_file *m, void *unused) 
	intel_runtime_pm_get(dev_priv);



	for_each_engine_id(engine, dev_priv, id) {

		seqno[id] = engine->get_seqno(engine, false);

		acthd[id] = intel_ring_get_active_head(engine);

		seqno[id] = engine->get_seqno(engine);

	}



	i915_get_extra_instdone(dev, instdone);
@@ -1362,8 +1363,13 @@ static int i915_hangcheck_info(struct seq_file *m, void *unused) 


	for_each_engine_id(engine, dev_priv, id) {

		seq_printf(m, "%s:\n", engine->name);

		seq_printf(m, "\tseqno = %x [current %x]\n",

			   engine->hangcheck.seqno, seqno[id]);

		seq_printf(m, "\tseqno = %x [current %x, last %x]\n",

			   engine->hangcheck.seqno,

			   seqno[id],

			   engine->last_submitted_seqno);

		seq_printf(m, "\tuser interrupts = %x [current %x]\n",

			   engine->hangcheck.user_interrupts,

			   READ_ONCE(engine->user_interrupts));

		seq_printf(m, "\tACTHD = 0x%08llx [current 0x%08llx]\n",

			   (long long)engine->hangcheck.acthd,

			   (long long)acthd[id]);
@@ -1895,6 +1901,11 @@ static int i915_gem_framebuffer_info(struct seq_file *m, void *data) 
	struct drm_device *dev = node->minor->dev;

	struct intel_framebuffer *fbdev_fb = NULL;

	struct drm_framebuffer *drm_fb;

	int ret;



	ret = mutex_lock_interruptible(&dev->struct_mutex);

	if (ret)

		return ret;



#ifdef CONFIG_DRM_FBDEV_EMULATION

       if (to_i915(dev)->fbdev) {
@@ -1929,6 +1940,7 @@ static int i915_gem_framebuffer_info(struct seq_file *m, void *data) 
		seq_putc(m, '\n');

	}

	mutex_unlock(&dev->mode_config.fb_lock);

	mutex_unlock(&dev->struct_mutex);



	return 0;

}
@@ -2093,7 +2105,6 @@ static int i915_execlists(struct seq_file *m, void *data) 
	for_each_engine(engine, dev_priv) {

		struct drm_i915_gem_request *head_req = NULL;

		int count = 0;

		unsigned long flags;



		seq_printf(m, "%s\n", engine->name);
@@ -2120,13 +2131,13 @@ static int i915_execlists(struct seq_file *m, void *data) 
				   i, status, ctx_id);

		}



		spin_lock_irqsave(&engine->execlist_lock, flags);

		spin_lock_bh(&engine->execlist_lock);

		list_for_each(cursor, &engine->execlist_queue)

			count++;

		head_req = list_first_entry_or_null(&engine->execlist_queue,

						    struct drm_i915_gem_request,

						    execlist_link);

		spin_unlock_irqrestore(&engine->execlist_lock, flags);

		spin_unlock_bh(&engine->execlist_lock);



		seq_printf(m, "\t%d requests in queue\n", count);

		if (head_req) {
@@ -2409,7 +2420,7 @@ static int i915_guc_load_status_info(struct seq_file *m, void *data) 
	struct intel_guc_fw *guc_fw = &dev_priv->guc.guc_fw;

	u32 tmp, i;



	if (!HAS_GUC_UCODE(dev_priv->dev))

	if (!HAS_GUC_UCODE(dev_priv))

		return 0;



	seq_printf(m, "GuC firmware status:\n");
@@ -2483,7 +2494,7 @@ static int i915_guc_info(struct seq_file *m, void *data) 
	struct intel_engine_cs *engine;

	u64 total = 0;



	if (!HAS_GUC_SCHED(dev_priv->dev))

	if (!HAS_GUC_SCHED(dev_priv))

		return 0;



	if (mutex_lock_interruptible(&dev->struct_mutex))
@@ -2687,10 +2698,8 @@ static int i915_runtime_pm_status(struct seq_file *m, void *unused) 
	struct drm_device *dev = node->minor->dev;

	struct drm_i915_private *dev_priv = dev->dev_private;



	if (!HAS_RUNTIME_PM(dev)) {

		seq_puts(m, "not supported\n");

		return 0;

	}

	if (!HAS_RUNTIME_PM(dev_priv))

		seq_puts(m, "Runtime power management not supported\n");



	seq_printf(m, "GPU idle: %s\n", yesno(!dev_priv->mm.busy));

	seq_printf(m, "IRQs disabled: %s\n",
@@ -2701,6 +2710,9 @@ static int i915_runtime_pm_status(struct seq_file *m, void *unused) 
#else

	seq_printf(m, "Device Power Management (CONFIG_PM) disabled\n");

#endif

	seq_printf(m, "PCI device power state: %s [%d]\n",

		   pci_power_name(dev_priv->dev->pdev->current_state),

		   dev_priv->dev->pdev->current_state);



	return 0;

}

drivers/gpu/drm/i915/i915_dma.c

+24 −19
Original line number Diff line number Diff line
@@ -493,9 +493,11 @@ static int i915_load_modeset_init(struct drm_device *dev) 
	 * Some ports require correctly set-up hpd registers for detection to

	 * work properly (leading to ghost connected connector status), e.g. VGA

	 * on gm45.  Hence we can only set up the initial fbdev config after hpd

	 * irqs are fully enabled. We protect the fbdev initial config scanning

	 * against hotplug events by waiting in intel_fbdev_output_poll_changed

	 * until the asynchronous thread has finished.

	 * irqs are fully enabled. Now we should scan for the initial config

	 * only once hotplug handling is enabled, but due to screwed-up locking

	 * around kms/fbdev init we can't protect the fdbev initial config

	 * scanning against hotplug events. Hence do this first and ignore the

	 * tiny window where we will loose hotplug notifactions.

	 */

	intel_fbdev_initial_config_async(dev);
@@ -527,6 +529,7 @@ static int i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv) 
{

	struct apertures_struct *ap;

	struct pci_dev *pdev = dev_priv->dev->pdev;

	struct i915_ggtt *ggtt = &dev_priv->ggtt;

	bool primary;

	int ret;
@@ -534,8 +537,8 @@ static int i915_kick_out_firmware_fb(struct drm_i915_private *dev_priv) 
	if (!ap)

		return -ENOMEM;



	ap->ranges[0].base = dev_priv->ggtt.mappable_base;

	ap->ranges[0].size = dev_priv->ggtt.mappable_end;

	ap->ranges[0].base = ggtt->mappable_base;

	ap->ranges[0].size = ggtt->mappable_end;



	primary =

		pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
@@ -1170,6 +1173,7 @@ static void i915_driver_cleanup_mmio(struct drm_i915_private *dev_priv) 
static int i915_driver_init_hw(struct drm_i915_private *dev_priv)

{

	struct drm_device *dev = dev_priv->dev;

	struct i915_ggtt *ggtt = &dev_priv->ggtt;

	uint32_t aperture_size;

	int ret;
@@ -1178,7 +1182,7 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv) 


	intel_device_info_runtime_init(dev);



	ret = i915_gem_gtt_init(dev);

	ret = i915_ggtt_init_hw(dev);

	if (ret)

		return ret;
@@ -1187,13 +1191,13 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv) 
	ret = i915_kick_out_firmware_fb(dev_priv);

	if (ret) {

		DRM_ERROR("failed to remove conflicting framebuffer drivers\n");

		goto out_gtt;

		goto out_ggtt;

	}



	ret = i915_kick_out_vgacon(dev_priv);

	if (ret) {

		DRM_ERROR("failed to remove conflicting VGA console\n");

		goto out_gtt;

		goto out_ggtt;

	}



	pci_set_master(dev->pdev);
@@ -1213,17 +1217,17 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv) 
	if (IS_BROADWATER(dev) || IS_CRESTLINE(dev))

		dma_set_coherent_mask(&dev->pdev->dev, DMA_BIT_MASK(32));



	aperture_size = dev_priv->ggtt.mappable_end;

	aperture_size = ggtt->mappable_end;



	dev_priv->ggtt.mappable =

		io_mapping_create_wc(dev_priv->ggtt.mappable_base,

	ggtt->mappable =

		io_mapping_create_wc(ggtt->mappable_base,

				     aperture_size);

	if (dev_priv->ggtt.mappable == NULL) {

	if (!ggtt->mappable) {

		ret = -EIO;

		goto out_gtt;

		goto out_ggtt;

	}



	dev_priv->ggtt.mtrr = arch_phys_wc_add(dev_priv->ggtt.mappable_base,

	ggtt->mtrr = arch_phys_wc_add(ggtt->mappable_base,

					      aperture_size);



	pm_qos_add_request(&dev_priv->pm_qos, PM_QOS_CPU_DMA_LATENCY,
@@ -1253,8 +1257,8 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv) 


	return 0;



out_gtt:

	i915_global_gtt_cleanup(dev);

out_ggtt:

	i915_ggtt_cleanup_hw(dev);



	return ret;

}
@@ -1266,14 +1270,15 @@ static int i915_driver_init_hw(struct drm_i915_private *dev_priv) 
static void i915_driver_cleanup_hw(struct drm_i915_private *dev_priv)

{

	struct drm_device *dev = dev_priv->dev;

	struct i915_ggtt *ggtt = &dev_priv->ggtt;



	if (dev->pdev->msi_enabled)

		pci_disable_msi(dev->pdev);



	pm_qos_remove_request(&dev_priv->pm_qos);

	arch_phys_wc_del(dev_priv->ggtt.mtrr);

	io_mapping_free(dev_priv->ggtt.mappable);

	i915_global_gtt_cleanup(dev);

	arch_phys_wc_del(ggtt->mtrr);

	io_mapping_free(ggtt->mappable);

	i915_ggtt_cleanup_hw(dev);

}



/**

drivers/gpu/drm/i915/i915_drv.c

+2 −4
Original line number Diff line number Diff line
@@ -360,14 +360,12 @@ static const struct intel_device_info intel_broxton_info = { 


static const struct intel_device_info intel_kabylake_info = {

	BDW_FEATURES,

	.is_preliminary = 1,

	.is_kabylake = 1,

	.gen = 9,

};



static const struct intel_device_info intel_kabylake_gt3_info = {

	BDW_FEATURES,

	.is_preliminary = 1,

	.is_kabylake = 1,

	.gen = 9,

	.ring_mask = RENDER_RING | BSD_RING | BLT_RING | VEBOX_RING | BSD2_RING,
@@ -1402,7 +1400,7 @@ static int vlv_suspend_complete(struct drm_i915_private *dev_priv) 
	if (err)

		goto err2;



	if (!IS_CHERRYVIEW(dev_priv->dev))

	if (!IS_CHERRYVIEW(dev_priv))

		vlv_save_gunit_s0ix_state(dev_priv);



	err = vlv_force_gfx_clock(dev_priv, false);
@@ -1434,7 +1432,7 @@ static int vlv_resume_prepare(struct drm_i915_private *dev_priv, 
	 */

	ret = vlv_force_gfx_clock(dev_priv, true);



	if (!IS_CHERRYVIEW(dev_priv->dev))

	if (!IS_CHERRYVIEW(dev_priv))

		vlv_restore_gunit_s0ix_state(dev_priv);



	err = vlv_allow_gt_wake(dev_priv, true);

drivers/gpu/drm/i915/i915_drv.h

+73 −17
Original line number Diff line number Diff line
@@ -60,7 +60,7 @@ 


#define DRIVER_NAME		"i915"

#define DRIVER_DESC		"Intel Graphics"

#define DRIVER_DATE		"20160330"

#define DRIVER_DATE		"20160411"



#undef WARN_ON

/* Many gcc seem to no see through this and fall over :( */
@@ -495,6 +495,7 @@ struct drm_i915_error_state { 
		u32 cpu_ring_head;

		u32 cpu_ring_tail;



		u32 last_seqno;

		u32 semaphore_seqno[I915_NUM_ENGINES - 1];



		/* Register state */
@@ -612,8 +613,8 @@ struct drm_i915_display_funcs { 
	/* display clock increase/decrease */

	/* pll clock increase/decrease */



	void (*load_csc_matrix)(struct drm_crtc *crtc);

	void (*load_luts)(struct drm_crtc *crtc);

	void (*load_csc_matrix)(struct drm_crtc_state *crtc_state);

	void (*load_luts)(struct drm_crtc_state *crtc_state);

};



enum forcewake_domain_id {
@@ -1118,6 +1119,7 @@ struct intel_gen6_power_mgmt { 
	u8 efficient_freq;	/* AKA RPe. Pre-determined balanced frequency */

	u8 rp1_freq;		/* "less than" RP0 power/freqency */

	u8 rp0_freq;		/* Non-overclocked max frequency. */

	u16 gpll_ref_freq;	/* vlv/chv GPLL reference frequency */



	u8 up_threshold; /* Current %busy required to uplock */

	u8 down_threshold; /* Current %busy required to downclock */
@@ -1257,6 +1259,7 @@ struct i915_gem_mm { 
	struct i915_hw_ppgtt *aliasing_ppgtt;



	struct notifier_block oom_notifier;

	struct notifier_block vmap_notifier;

	struct shrinker shrinker;

	bool shrinker_no_lock_stealing;
@@ -1837,6 +1840,13 @@ struct drm_i915_private { 
	struct intel_shared_dpll shared_dplls[I915_NUM_PLLS];

	const struct intel_dpll_mgr *dpll_mgr;



	/*

	 * dpll_lock serializes intel_{prepare,enable,disable}_shared_dpll.

	 * Must be global rather than per dpll, because on some platforms

	 * plls share registers.

	 */

	struct mutex dpll_lock;



	unsigned int active_crtcs;

	unsigned int min_pixclk[I915_MAX_PIPES];
@@ -1893,7 +1903,14 @@ struct drm_i915_private { 


	u32 fdi_rx_config;



	/* Shadow for DISPLAY_PHY_CONTROL which can't be safely read */

	u32 chv_phy_control;

	/*

	 * Shadows for CHV DPLL_MD regs to keep the state

	 * checker somewhat working in the presence hardware

	 * crappiness (can't read out DPLL_MD for pipes B & C).

	 */

	u32 chv_dpll_md[I915_MAX_PIPES];



	u32 suspend_count;

	bool suspended_to_idle;
@@ -2152,10 +2169,7 @@ struct drm_i915_gem_object { 
		struct scatterlist *sg;

		int last;

	} get_page;



	/* prime dma-buf support */

	void *dma_buf_vmapping;

	int vmapping_count;

	void *mapping;



	/** Breadcrumb of last rendering to the buffer.

	 * There can only be one writer, but we allow for multiple readers.
@@ -2732,6 +2746,7 @@ extern long i915_compat_ioctl(struct file *filp, unsigned int cmd, 
extern int intel_gpu_reset(struct drm_device *dev, u32 engine_mask);

extern bool intel_has_gpu_reset(struct drm_device *dev);

extern int i915_reset(struct drm_device *dev);

extern int intel_guc_reset(struct drm_i915_private *dev_priv);

extern void intel_engine_init_hangcheck(struct intel_engine_cs *engine);

extern unsigned long i915_chipset_val(struct drm_i915_private *dev_priv);

extern unsigned long i915_mch_val(struct drm_i915_private *dev_priv);
@@ -2970,12 +2985,44 @@ static inline void i915_gem_object_pin_pages(struct drm_i915_gem_object *obj) 
	BUG_ON(obj->pages == NULL);

	obj->pages_pin_count++;

}



static inline void i915_gem_object_unpin_pages(struct drm_i915_gem_object *obj)

{

	BUG_ON(obj->pages_pin_count == 0);

	obj->pages_pin_count--;

}



/**

 * i915_gem_object_pin_map - return a contiguous mapping of the entire object

 * @obj - the object to map into kernel address space

 *

 * Calls i915_gem_object_pin_pages() to prevent reaping of the object's

 * pages and then returns a contiguous mapping of the backing storage into

 * the kernel address space.

 *

 * The caller must hold the struct_mutex.

 *

 * Returns the pointer through which to access the backing storage.

 */

void *__must_check i915_gem_object_pin_map(struct drm_i915_gem_object *obj);



/**

 * i915_gem_object_unpin_map - releases an earlier mapping

 * @obj - the object to unmap

 *

 * After pinning the object and mapping its pages, once you are finished

 * with your access, call i915_gem_object_unpin_map() to release the pin

 * upon the mapping. Once the pin count reaches zero, that mapping may be

 * removed.

 *

 * The caller must hold the struct_mutex.

 */

static inline void i915_gem_object_unpin_map(struct drm_i915_gem_object *obj)

{

	lockdep_assert_held(&obj->base.dev->struct_mutex);

	i915_gem_object_unpin_pages(obj);

}



int __must_check i915_mutex_lock_interruptible(struct drm_device *dev);

int i915_gem_object_sync(struct drm_i915_gem_object *obj,

			 struct intel_engine_cs *to,
@@ -2999,15 +3046,19 @@ i915_seqno_passed(uint32_t seq1, uint32_t seq2) 
static inline bool i915_gem_request_started(struct drm_i915_gem_request *req,

					   bool lazy_coherency)

{

	u32 seqno = req->engine->get_seqno(req->engine, lazy_coherency);

	return i915_seqno_passed(seqno, req->previous_seqno);

	if (!lazy_coherency && req->engine->irq_seqno_barrier)

		req->engine->irq_seqno_barrier(req->engine);

	return i915_seqno_passed(req->engine->get_seqno(req->engine),

				 req->previous_seqno);

}



static inline bool i915_gem_request_completed(struct drm_i915_gem_request *req,

					      bool lazy_coherency)

{

	u32 seqno = req->engine->get_seqno(req->engine, lazy_coherency);

	return i915_seqno_passed(seqno, req->seqno);

	if (!lazy_coherency && req->engine->irq_seqno_barrier)

		req->engine->irq_seqno_barrier(req->engine);

	return i915_seqno_passed(req->engine->get_seqno(req->engine),

				 req->seqno);

}



int __must_check i915_gem_get_seqno(struct drm_device *dev, u32 *seqno);
@@ -3147,13 +3198,9 @@ i915_gem_obj_to_ggtt(struct drm_i915_gem_object *obj) 
bool i915_gem_obj_is_pinned(struct drm_i915_gem_object *obj);



/* Some GGTT VM helpers */

#define i915_obj_to_ggtt(obj) \

	(&((struct drm_i915_private *)(obj)->base.dev->dev_private)->ggtt.base)



static inline struct i915_hw_ppgtt *

i915_vm_to_ppgtt(struct i915_address_space *vm)

{

	WARN_ON(i915_is_ggtt(vm));

	return container_of(vm, struct i915_hw_ppgtt, base);

}
@@ -3166,7 +3213,10 @@ static inline bool i915_gem_obj_ggtt_bound(struct drm_i915_gem_object *obj) 
static inline unsigned long

i915_gem_obj_ggtt_size(struct drm_i915_gem_object *obj)

{

	return i915_gem_obj_size(obj, i915_obj_to_ggtt(obj));

	struct drm_i915_private *dev_priv = to_i915(obj->base.dev);

	struct i915_ggtt *ggtt = &dev_priv->ggtt;



	return i915_gem_obj_size(obj, &ggtt->base);

}



static inline int __must_check
@@ -3174,7 +3224,10 @@ i915_gem_obj_ggtt_pin(struct drm_i915_gem_object *obj, 
		      uint32_t alignment,

		      unsigned flags)

{

	return i915_gem_object_pin(obj, i915_obj_to_ggtt(obj),

	struct drm_i915_private *dev_priv = to_i915(obj->base.dev);

	struct i915_ggtt *ggtt = &dev_priv->ggtt;



	return i915_gem_object_pin(obj, &ggtt->base,

				   alignment, flags | PIN_GLOBAL);

}
@@ -3289,6 +3342,7 @@ unsigned long i915_gem_shrink(struct drm_i915_private *dev_priv, 
#define I915_SHRINK_UNBOUND 0x2

#define I915_SHRINK_BOUND 0x4

#define I915_SHRINK_ACTIVE 0x8

#define I915_SHRINK_VMAPS 0x10

unsigned long i915_gem_shrink_all(struct drm_i915_private *dev_priv);

void i915_gem_shrinker_init(struct drm_i915_private *dev_priv);

void i915_gem_shrinker_cleanup(struct drm_i915_private *dev_priv);
@@ -3388,6 +3442,8 @@ bool intel_bios_is_tv_present(struct drm_i915_private *dev_priv); 
bool intel_bios_is_lvds_present(struct drm_i915_private *dev_priv, u8 *i2c_pin);

bool intel_bios_is_port_edp(struct drm_i915_private *dev_priv, enum port port);

bool intel_bios_is_dsi_present(struct drm_i915_private *dev_priv, enum port *port);

bool intel_bios_is_port_hpd_inverted(struct drm_i915_private *dev_priv,

				     enum port port);



/* intel_opregion.c */

#ifdef CONFIG_ACPI

drivers/gpu/drm/i915/i915_gem.c

+118 −53

File changed.

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