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Commit 5f8824de authored by Ben Skeggs's avatar Ben Skeggs
Browse files

drm/nouveau/bus: namespace + nvidia gpu names (no binary change) 



The namespace of NVKM is being changed to nvkm_ instead of nouveau_,
which will be used for the DRM part of the driver.  This is being
done in order to make it very clear as to what part of the driver a
given symbol belongs to, and as a minor step towards splitting the
DRM driver out to be able to stand on its own (for virt).

Because there's already a large amount of churn here anyway, this is
as good a time as any to also switch to NVIDIA's device and chipset
naming to ease collaboration with them.

A comparison of objdump disassemblies proves no code changes.

Signed-off-by: default avatarBen Skeggs <bskeggs@redhat.com>
parent d390b480

drivers/gpu/drm/nouveau/include/nvkm/subdev/bus.h

+34 −37
Original line number Original line Diff line number Diff line 
#ifndef __NOUVEAU_BUS_H__

#ifndef __NVKM_BUS_H__

#define __NOUVEAU_BUS_H__

#define __NVKM_BUS_H__



#include <core/subdev.h>

#include <core/subdev.h>

#include <core/device.h>





struct nouveau_bus_intr {

struct nvkm_bus_intr {

	u32 stat;

	u32 stat;

	u32 unit;

	u32 unit;

};

};





struct nouveau_bus {

struct nvkm_bus {

	struct nouveau_subdev base;

	struct nvkm_subdev base;

	int (*hwsq_exec)(struct nouveau_bus *, u32 *, u32);

	int (*hwsq_exec)(struct nvkm_bus *, u32 *, u32);

	u32 hwsq_size;

	u32 hwsq_size;

};

};





static inline struct nouveau_bus *

static inline struct nvkm_bus *

nouveau_bus(void *obj)

nvkm_bus(void *obj)

{

{

	return (void *)nouveau_subdev(obj, NVDEV_SUBDEV_BUS);

	return (void *)nvkm_subdev(obj, NVDEV_SUBDEV_BUS);

}

}





#define nouveau_bus_create(p, e, o, d)                                         \

#define nvkm_bus_create(p, e, o, d)                                         \

	nouveau_subdev_create_((p), (e), (o), 0, "PBUS", "master",             \

	nvkm_subdev_create_((p), (e), (o), 0, "PBUS", "master",             \

			       sizeof(**d), (void **)d)

			       sizeof(**d), (void **)d)

#define nouveau_bus_destroy(p)                                                 \

#define nvkm_bus_destroy(p)                                                 \

	nouveau_subdev_destroy(&(p)->base)

	nvkm_subdev_destroy(&(p)->base)

#define nouveau_bus_init(p)                                                    \

#define nvkm_bus_init(p)                                                    \

	nouveau_subdev_init(&(p)->base)

	nvkm_subdev_init(&(p)->base)

#define nouveau_bus_fini(p, s)                                                 \

#define nvkm_bus_fini(p, s)                                                 \

	nouveau_subdev_fini(&(p)->base, (s))

	nvkm_subdev_fini(&(p)->base, (s))





#define _nouveau_bus_dtor _nouveau_subdev_dtor

#define _nvkm_bus_dtor _nvkm_subdev_dtor

#define _nouveau_bus_init _nouveau_subdev_init

#define _nvkm_bus_init _nvkm_subdev_init

#define _nouveau_bus_fini _nouveau_subdev_fini

#define _nvkm_bus_fini _nvkm_subdev_fini





extern struct nouveau_oclass *nv04_bus_oclass;

extern struct nvkm_oclass *nv04_bus_oclass;

extern struct nouveau_oclass *nv31_bus_oclass;

extern struct nvkm_oclass *nv31_bus_oclass;

extern struct nouveau_oclass *nv50_bus_oclass;

extern struct nvkm_oclass *nv50_bus_oclass;

extern struct nouveau_oclass *nv94_bus_oclass;

extern struct nvkm_oclass *g94_bus_oclass;

extern struct nouveau_oclass *nvc0_bus_oclass;

extern struct nvkm_oclass *gf100_bus_oclass;





/* interface to sequencer */

/* interface to sequencer */

struct nouveau_hwsq;

struct nvkm_hwsq;

int  nouveau_hwsq_init(struct nouveau_bus *, struct nouveau_hwsq **);

int  nvkm_hwsq_init(struct nvkm_bus *, struct nvkm_hwsq **);

int  nouveau_hwsq_fini(struct nouveau_hwsq **, bool exec);

int  nvkm_hwsq_fini(struct nvkm_hwsq **, bool exec);

void nouveau_hwsq_wr32(struct nouveau_hwsq *, u32 addr, u32 data);

void nvkm_hwsq_wr32(struct nvkm_hwsq *, u32 addr, u32 data);

void nouveau_hwsq_setf(struct nouveau_hwsq *, u8 flag, int data);

void nvkm_hwsq_setf(struct nvkm_hwsq *, u8 flag, int data);

void nouveau_hwsq_wait(struct nouveau_hwsq *, u8 flag, u8 data);

void nvkm_hwsq_wait(struct nvkm_hwsq *, u8 flag, u8 data);

void nouveau_hwsq_nsec(struct nouveau_hwsq *, u32 nsec);

void nvkm_hwsq_nsec(struct nvkm_hwsq *, u32 nsec);



#endif
 
#endif

drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -70,7 +70,7 @@ gm100_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  gm107_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  gm107_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  gm107_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  gm107_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gm107_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gm107_ltc_oclass;
@@ -114,7 +114,7 @@ gm100_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  gm204_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  gm204_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  gm107_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  gm107_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gm107_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gm107_ltc_oclass;

drivers/gpu/drm/nouveau/nvkm/engine/device/nv50.c

+10 −10
Original line number Original line Diff line number Diff line
@@ -185,7 +185,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv84_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv84_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv94_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv94_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nv94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv84_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv84_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
@@ -214,7 +214,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv84_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv84_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv94_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv94_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nv94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv84_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv84_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
@@ -243,7 +243,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv98_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv98_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nv94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv84_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv84_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
@@ -272,7 +272,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv84_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv84_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nv94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv84_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nv84_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
@@ -301,7 +301,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv98_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv98_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nv94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvaa_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvaa_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
@@ -330,7 +330,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv98_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nv98_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nv94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvaa_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvaa_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
@@ -359,7 +359,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nva3_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nva3_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nv94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nva3_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nva3_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
@@ -390,7 +390,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nva3_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nva3_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nv94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nva3_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nva3_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
@@ -420,7 +420,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nva3_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nva3_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nv94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nva3_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nva3_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;
@@ -450,7 +450,7 @@ nv50_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvaf_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvaf_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nv98_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nv94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  g94_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvaf_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvaf_fb_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

		device->oclass[NVDEV_SUBDEV_INSTMEM] =  nv50_instmem_oclass;

drivers/gpu/drm/nouveau/nvkm/engine/device/nvc0.c

+9 −9
Original line number Original line Diff line number Diff line
@@ -70,7 +70,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc0_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc0_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;
@@ -103,7 +103,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc0_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc0_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;
@@ -136,7 +136,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;
@@ -168,7 +168,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc0_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc0_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;
@@ -201,7 +201,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;
@@ -233,7 +233,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;
@@ -265,7 +265,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc0_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc0_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;
@@ -298,7 +298,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;
@@ -330,7 +330,7 @@ nvc0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nvc0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gf100_ltc_oclass;

drivers/gpu/drm/nouveau/nvkm/engine/device/nve0.c

+8 −8
Original line number Original line Diff line number Diff line
@@ -70,7 +70,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
@@ -104,7 +104,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
@@ -138,7 +138,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
@@ -165,7 +165,7 @@ nve0_identify(struct nouveau_device *device) 
		device->cname = "GK20A";

		device->cname = "GK20A";

		device->oclass[NVDEV_SUBDEV_CLK    ] = &gk20a_clk_oclass;

		device->oclass[NVDEV_SUBDEV_CLK    ] = &gk20a_clk_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;

		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;

		device->oclass[NVDEV_SUBDEV_FUSE   ] = &gf100_fuse_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &gk20a_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  gk20a_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  gk20a_fb_oclass;
@@ -194,7 +194,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
@@ -228,7 +228,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  nvc3_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
@@ -262,7 +262,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;
@@ -295,7 +295,7 @@ nve0_identify(struct nouveau_device *device) 
		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_MXM    ] = &nv50_mxm_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_DEVINIT] =  nvc0_devinit_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;

		device->oclass[NVDEV_SUBDEV_MC     ] =  gk20a_mc_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  nvc0_bus_oclass;

		device->oclass[NVDEV_SUBDEV_BUS    ] =  gf100_bus_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_TIMER  ] = &nv04_timer_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_FB     ] =  nve0_fb_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;

		device->oclass[NVDEV_SUBDEV_LTC    ] =  gk104_ltc_oclass;