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Commit 5e12a613 authored by Ezequiel Garcia's avatar Ezequiel Garcia Committed by Jason Cooper
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ARM: mvebu: Add MBus to Armada 370/XP device tree



The Armada 370/XP SoC family has a completely configurable address
space handled by the MBus controller.

This patch introduces the device tree layout of MBus, making the
'soc' node as mbus-compatible.
Since every peripheral/controller is a child of this 'soc' node,
this makes all of them sit behind the mbus, thus describing the
hardware accurately.

A translation entry has been added for the internal-regs mapping.
This can't be done in the common armada-370-xp.dtsi because A370
and AXP have different addressing width.

Signed-off-by: default avatarEzequiel Garcia <ezequiel.garcia@free-electrons.com>
Tested-by: default avatarAndrew Lunn <andrew@lunn.ch>
Tested-by: default avatarSebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
Signed-off-by: default avatarJason Cooper <jason@lakedaemon.net>
parent 38149887
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+2 −0
Original line number Diff line number Diff line
@@ -30,6 +30,8 @@
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000>;

		internal-regs {
			serial@12000 {
				clock-frequency = <200000000>;
+2 −0
Original line number Diff line number Diff line
@@ -25,6 +25,8 @@
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000>;

		internal-regs {
			serial@12000 {
				clock-frequency = <200000000>;
+2 −0
Original line number Diff line number Diff line
@@ -28,6 +28,8 @@
	};

	soc {
		ranges = <MBUS_ID(0xf0, 0x01) 0 0xd0000000 0x100000>;

		internal-regs {
			serial@12000 {
				clock-frequency = <200000000>;
+10 −5
Original line number Diff line number Diff line
@@ -18,6 +18,8 @@

/include/ "skeleton64.dtsi"

#define MBUS_ID(target,attributes) (((target) << 24) | ((attributes) << 16))

/ {
	model = "Marvell Armada 370 and XP SoC";
	compatible = "marvell,armada-370-xp";
@@ -38,18 +40,21 @@
	};

	soc {
		#address-cells = <1>;
		#address-cells = <2>;
		#size-cells = <1>;
		compatible = "simple-bus";
		controller = <&mbusc>;
		interrupt-parent = <&mpic>;
		ranges = <0          0 0xd0000000 0x0100000 /* internal registers */
			  0xe0000000 0 0xe0000000 0x8100000 /* PCIe */>;

		internal-regs {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			ranges;
			ranges = <0 MBUS_ID(0xf0, 0x01) 0 0x100000>;

			mbusc: mbus-controller@20000 {
				compatible = "marvell,mbus-controller";
				reg = <0x20000 0x100>, <0x20180 0x20>;
			};

			mpic: interrupt-controller@20000 {
				compatible = "marvell,mpic";
+2 −2
Original line number Diff line number Diff line
@@ -29,8 +29,8 @@
	};

	soc {
		ranges = <0          0xd0000000 0x0100000 /* internal registers */
			  0xe0000000 0xe0000000 0x8100000 /* PCIe */>;
		compatible = "marvell,armada370-mbus", "simple-bus";

		internal-regs {
			system-controller@18200 {
				compatible = "marvell,armada-370-xp-system-controller";
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