Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 5cf021d5 authored by Masahiro Yamada's avatar Masahiro Yamada Committed by Linus Walleij
Browse files

pinctrl: zynq: fix offset address for {SD0,SD1}_WP_CD_SEL 



The address for SD0_WP_CD_SEL, SD1_WP_CD_SEL is 0xf8000830,
0xf8000834, respectively.

Each offset address must be prefixed with 0x.

Fixes: add958ce "pinctrl: Add driver for Zynq"
Signed-off-by: default avatarMasahiro Yamada <yamada.masahiro@socionext.com>
Reviewed-by: default avatarSören Brinkmann <soren.brinkmann@xilinx.com>
Signed-off-by: default avatarLinus Walleij <linus.walleij@linaro.org>
parent 4f652cea

drivers/pinctrl/pinctrl-zynq.c

+4 −4
Original line number Diff line number Diff line
@@ -801,15 +801,15 @@ static const struct zynq_pinmux_function zynq_pmux_functions[] = { 
	DEFINE_ZYNQ_PINMUX_FUNCTION(spi1_ss, 0x50),

	DEFINE_ZYNQ_PINMUX_FUNCTION(sdio0, 0x40),

	DEFINE_ZYNQ_PINMUX_FUNCTION(sdio0_pc, 0xc),

	DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(sdio0_wp, 0, 130, ZYNQ_SDIO_WP_MASK,

	DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(sdio0_wp, 0, 0x130, ZYNQ_SDIO_WP_MASK,

					ZYNQ_SDIO_WP_SHIFT),

	DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(sdio0_cd, 0, 130, ZYNQ_SDIO_CD_MASK,

	DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(sdio0_cd, 0, 0x130, ZYNQ_SDIO_CD_MASK,

					ZYNQ_SDIO_CD_SHIFT),

	DEFINE_ZYNQ_PINMUX_FUNCTION(sdio1, 0x40),

	DEFINE_ZYNQ_PINMUX_FUNCTION(sdio1_pc, 0xc),

	DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(sdio1_wp, 0, 134, ZYNQ_SDIO_WP_MASK,

	DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(sdio1_wp, 0, 0x134, ZYNQ_SDIO_WP_MASK,

					ZYNQ_SDIO_WP_SHIFT),

	DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(sdio1_cd, 0, 134, ZYNQ_SDIO_CD_MASK,

	DEFINE_ZYNQ_PINMUX_FUNCTION_MUX(sdio1_cd, 0, 0x134, ZYNQ_SDIO_CD_MASK,

					ZYNQ_SDIO_CD_SHIFT),

	DEFINE_ZYNQ_PINMUX_FUNCTION(smc0_nor, 4),

	DEFINE_ZYNQ_PINMUX_FUNCTION(smc0_nor_cs1, 8),